EPM7256ERC208-12P
EE PLD, 12ns, 256-Cell, CMOS, PQFP208Manufacturer: Altera
Categories: Programmable Logic Devices
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Altera's EPM7256 series EE PLD, part number EPM7256ERC208-12P, offers a 256-macrocell architecture with a propagation delay of 12ns and a maximum clock frequency of 125MHz. This CMOS device supports configurable I/O operation at 3.3V or 5V, with 164 I/O lines available. It is housed in a 208-pin PQFP package (JESD-30 Code S-PQFP-G208) with a 0.500mm terminal pitch. Designed for surface mounting, the EPM7256ERC208-12P operates within a temperature range of 0°C to 70°C and a supply voltage of 4.75V to 5.25V. Applications span industrial control, telecommunications, and computing systems requiring flexible logic implementation.
Additional Information
Series: EPM7256RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Length | 28.0000 |
| Width | 28.0000 |
| Technology | CMOS |
| Additional_Feature | CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V |
| Clock_Frequency_Max | 125.00000 |
| In_System_Programmable | No |
| JESD_30_Code | S-PQFP-G208 |
| JTAG_BST | No |
| Number_of_Dedicated_Inputs | 0 |
| Number_of_I_O_Lines | 164 |
| Number_of_Inputs | 164 |
| Number_of_Macro_Cells | 256 |
| Number_of_Outputs | 164 |
| Number_of_Terminals | 208 |
| Operating_Temperature_Max | 70.0 |
| Operating_Temperature_Min | 0.0 |
| Organization | 0 DEDICATED INPUTS, 164 I/O |
| Output_Function | MACROCELL |
| Package_Body_Material | PLASTIC/EPOXY |
| Package_Code | FQFP |
| Package_Equivalence_Code | HQFP208,1.2SQ,20 |
| Package_Shape | Square |
| Package_Style | FLATPACK, FINE PITCH |
| Programmable_Logic_Type | EE PLD |
| Propagation_Delay | 12.000 |
| Seated_Height_Max | 4.1000 |
| Supply_Voltage_Max | 5.25000 |
| Supply_Voltage_Min | 4.75000 |
| Supply_Voltage_Nom | 5 |
| Surface_Mount | Yes |
| Terminal_Form | Gull Wing |
| Terminal_Pitch | 0.500 |
| Terminal_Position | QUAD |
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