EPM7256EGC192-7
EE PLD, 7.5ns, 256-Cell, CMOS, CPGA192Manufacturer: Altera
Categories: Programmable Logic Devices
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The Altera EPM7256EGC192-7 is an EE PLD from the EPM7256 series, featuring 256 macrocells and a propagation delay of 7.5ns. This CMOS device operates within a supply voltage range of 4.75V to 5.25V and supports configurable I/O operation with 3.3V or 5V compatibility. It offers 160 I/O lines and 192 terminals in a 192-pin ceramic, metal-sealed cofired grid array (CPGA) package. The component is designed for applications requiring flexible logic implementation and is suitable for industries such as telecommunications, industrial automation, and consumer electronics. Its maximum clock frequency is 125MHz, and it operates within an ambient temperature range of 0°C to 70°C.
Additional Information
Series: EPM7256RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Width | 45.1500 |
| Technology | CMOS |
| Length | 45.1500 |
| Additional_Feature | CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V |
| Clock_Frequency_Max | 125.00000 |
| In_System_Programmable | No |
| JESD_30_Code | S-CPGA-P192 |
| JTAG_BST | No |
| Number_of_Dedicated_Inputs | 0 |
| Number_of_I_O_Lines | 160 |
| Number_of_Macro_Cells | 256 |
| Number_of_Terminals | 192 |
| Operating_Temperature_Max | 70.0 |
| Operating_Temperature_Min | 0.0 |
| Organization | 0 DEDICATED INPUTS, 160 I/O |
| Output_Function | MACROCELL |
| Package_Body_Material | CERAMIC, METAL-SEALED COFIRED |
| Package_Code | PGA |
| Package_Equivalence_Code | PGA192M,17X17 |
| Package_Shape | Square |
| Package_Style | GRID ARRAY |
| Programmable_Logic_Type | EE PLD |
| Propagation_Delay | 7.500 |
| Seated_Height_Max | 5.4300 |
| Supply_Voltage_Max | 5.25000 |
| Supply_Voltage_Min | 4.75000 |
| Supply_Voltage_Nom | 5 |
| Surface_Mount | No |
| Terminal_Form | PIN/PEG |
| Terminal_Pitch | 2.540 |
| Terminal_Position | Perpendicular |
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