EPM7256EGC192-10
EE PLD, 10ns, 256-Cell, CMOS, CPGA192Manufacturer: Altera
Categories: Programmable Logic Devices
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Altera EPM7256EGC192-10 is a 256-macrocell EE PLD from the EPM7256 series, featuring a 10ns propagation delay and CMOS technology. This device offers 160 I/O lines and 164 total inputs, with configurable I/O operation supporting 3.3V or 5V interfaces. Packaged in a 192-pin Ceramic Pin Grid Array (CPGA), it operates within a temperature range of 0°C to 70°C and requires a supply voltage between 4.75V and 5.25V. The EPM7256EGC192-10 is suitable for applications in telecommunications, industrial control, and consumer electronics.
Additional Information
Series: EPM7256RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Length | 45.1500 |
| Width | 45.1500 |
| Technology | CMOS |
| Additional_Feature | CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V |
| Clock_Frequency_Max | 100.00000 |
| In_System_Programmable | No |
| JESD_30_Code | S-CPGA-P192 |
| JTAG_BST | No |
| Number_of_Dedicated_Inputs | 0 |
| Number_of_I_O_Lines | 160 |
| Number_of_Inputs | 164 |
| Number_of_Macro_Cells | 256 |
| Number_of_Outputs | 160 |
| Number_of_Terminals | 192 |
| Operating_Temperature_Max | 70.0 |
| Operating_Temperature_Min | 0.0 |
| Organization | 0 DEDICATED INPUTS, 160 I/O |
| Output_Function | MACROCELL |
| Package_Body_Material | CERAMIC, METAL-SEALED COFIRED |
| Package_Code | PGA |
| Package_Equivalence_Code | PGA192M,17X17 |
| Package_Shape | Square |
| Package_Style | GRID ARRAY |
| Programmable_Logic_Type | EE PLD |
| Propagation_Delay | 10.000 |
| Seated_Height_Max | 5.4300 |
| Supply_Voltage_Max | 5.25000 |
| Supply_Voltage_Min | 4.75000 |
| Supply_Voltage_Nom | 5 |
| Surface_Mount | No |
| Terminal_Form | PIN/PEG |
| Terminal_Pitch | 2.540 |
| Terminal_Position | Perpendicular |
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