EPM7256EG5962192-20
EE PLD, 20ns, CMOS, CPGA192Manufacturer: Altera
Categories: Programmable Logic Devices
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Altera EPM7256 EE PLD, part number EPM7256EG5962192-20, is a 192-pin ceramic grid array (CPGA) device from the EPM7256 series. This CMOS technology component offers 256 macrocells and 160 configurable I/O lines supporting 3.3V or 5V operation. It features two external clocks and shared input/clock capabilities. The propagation delay is rated at 20ns, with a maximum clock frequency of 62.5 MHz. Operating temperature ranges from -55°C to +125°C, with a supply voltage of 4.5V to 5.5V. This device is utilized in industrial automation, telecommunications infrastructure, and legacy system upgrades.
Additional Information
Series: EPM7256RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Length | 45.1500 |
| Width | 45.1500 |
| Technology | CMOS |
| Additional_Feature | 256 MACROCELLS; CONFIGURABLE I/O OPERATION (3.3V OR 5V); 2 EXTERNAL CLOCKS; SHARED INPUT/CLOCK |
| Clock_Frequency_Max | 62.50000 |
| JESD_30_Code | S-CPGA-P192 |
| Number_of_Dedicated_Inputs | 0 |
| Number_of_I_O_Lines | 160 |
| Number_of_Terminals | 192 |
| Operating_Temperature_Max | 125.0 |
| Operating_Temperature_Min | -55.0 |
| Organization | 0 DEDICATED INPUTS, 160 I/O |
| Output_Function | MACROCELL |
| Package_Body_Material | CERAMIC, METAL-SEALED COFIRED |
| Package_Code | PGA |
| Package_Shape | Square |
| Package_Style | GRID ARRAY |
| Programmable_Logic_Type | EE PLD |
| Propagation_Delay | 20.000 |
| Seated_Height_Max | 5.4300 |
| Supply_Voltage_Max | 5.50000 |
| Supply_Voltage_Min | 4.50000 |
| Supply_Voltage_Nom | 5 |
| Surface_Mount | No |
| Terminal_Form | PIN/PEG |
| Terminal_Pitch | 2.540 |
| Terminal_Position | Perpendicular |
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