EPM7256ATI100-7
EE PLD, 7.5ns, 256-Cell, CMOS, PQFP100Manufacturer: Altera
Categories: Programmable Logic Devices
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The Altera EPM7256ATI100-7 is an electrically erasable Programmable Logic Device (PLD) from the EPM7256 series. This CMOS device features 256 macrocells and a maximum clock frequency of 125 MHz, with a propagation delay of 7.5 ns. It offers 80 I/O lines and 84 inputs, housed in a 100-pin PQFP package (S-PQFP-G100) with a 0.5mm terminal pitch. Designed for in-system programmability and equipped with JTAG Boundary Scan Test (BST) support, this device operates within a temperature range of -40°C to +85°C and a supply voltage of 3.0V to 3.6V. Its capabilities make it suitable for applications in industrial automation, telecommunications, and consumer electronics.
Additional Information
Series: EPM7256RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Width | 14.0000 |
| Technology | CMOS |
| Length | 14.0000 |
| Additional_Feature | 256 MACROCELLS |
| Clock_Frequency_Max | 125.00000 |
| In_System_Programmable | Yes |
| JESD_30_Code | S-PQFP-G100 |
| JTAG_BST | Yes |
| Number_of_Dedicated_Inputs | 0 |
| Number_of_I_O_Lines | 80 |
| Number_of_Inputs | 84 |
| Number_of_Macro_Cells | 256 |
| Number_of_Outputs | 80 |
| Number_of_Terminals | 100 |
| Operating_Temperature_Max | 85.0 |
| Operating_Temperature_Min | -40.0 |
| Organization | 0 DEDICATED INPUTS, 80 I/O |
| Output_Function | MACROCELL |
| Package_Body_Material | PLASTIC/EPOXY |
| Package_Code | LFQFP |
| Package_Equivalence_Code | TQFP100,.63SQ |
| Package_Shape | Square |
| Package_Style | FLATPACK, LOW PROFILE, FINE PITCH |
| Programmable_Logic_Type | EE PLD |
| Propagation_Delay | 7.500 |
| Seated_Height_Max | 1.2700 |
| Supply_Voltage_Max | 3.60000 |
| Supply_Voltage_Min | 3.00000 |
| Supply_Voltage_Nom | 3.3 |
| Surface_Mount | Yes |
| Terminal_Form | Gull Wing |
| Terminal_Pitch | 0.500 |
| Terminal_Position | QUAD |
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