EPM7256AEQI208-12
EE PLD, 12ns, CMOS, PQFP208Manufacturer: Altera
Categories: Programmable Logic Devices
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The Altera EPM7256AEQI208-12 is an EE PLD from the EPM7256 series, featuring a 12ns propagation delay and CMOS technology. This component is housed in a 208-pin PQFP package (JESD-30 Code S-PQFP-G208) with a 0.5mm terminal pitch. It offers 164 I/O lines and 164 inputs, with an organization of 0 dedicated inputs and 164 I/O. The device operates with a nominal supply voltage of 3.3V, ranging from 3.0V to 3.6V, and supports a maximum clock frequency of 100MHz. Its operating temperature range is -40°C to 85°C. This surface-mount device is suitable for applications in industrial automation, telecommunications, and consumer electronics.
Additional Information
Series: EPM7256RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Length | 28.0000 |
| Width | 28.0000 |
| Technology | CMOS |
| Clock_Frequency_Max | 100.00000 |
| JESD_30_Code | S-PQFP-G208 |
| Number_of_Dedicated_Inputs | 0 |
| Number_of_I_O_Lines | 164 |
| Number_of_Inputs | 164 |
| Number_of_Outputs | 164 |
| Number_of_Terminals | 208 |
| Operating_Temperature_Max | 85.0 |
| Operating_Temperature_Min | -40.0 |
| Organization | 0 DEDICATED INPUTS, 164 I/O |
| Output_Function | MACROCELL |
| Package_Body_Material | PLASTIC/EPOXY |
| Package_Code | FQFP |
| Package_Shape | Square |
| Package_Style | FLATPACK, FINE PITCH |
| Programmable_Logic_Type | EE PLD |
| Propagation_Delay | 12.000 |
| Seated_Height_Max | 4.1000 |
| Supply_Voltage_Max | 3.60000 |
| Supply_Voltage_Min | 3.00000 |
| Supply_Voltage_Nom | 3.3 |
| Surface_Mount | Yes |
| Terminal_Form | Gull Wing |
| Terminal_Pitch | 0.500 |
| Terminal_Position | QUAD |
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