

Manufacturer: Altera
Categories: Programmable Logic Devices
Quality Control: Learn More
| Length | 39.6240 |
| Width | 39.6240 |
| Technology | CMOS |
| Additional_Feature | 192 MACROCELLS; CONFIGURABLE I/O OPERATION (3.3V OR 5V); 2 EXTERNAL CLOCKS; SHARED INPUT/CLOCK |
| Clock_Frequency_Max | 62.50000 |
| In_System_Programmable | No |
| JESD_30_Code | S-CPGA-P160 |
| JTAG_BST | No |
| Number_of_Dedicated_Inputs | 0 |
| Number_of_I_O_Lines | 120 |
| Number_of_Inputs | 124 |
| Number_of_Macro_Cells | 192 |
| Number_of_Outputs | 120 |
| Number_of_Terminals | 160 |
| Operating_Temperature_Max | 125.0 |
| Operating_Temperature_Min | -55.0 |
| Organization | 0 DEDICATED INPUTS, 120 I/O |
| Output_Function | MACROCELL |
| Package_Body_Material | CERAMIC, METAL-SEALED COFIRED |
| Package_Code | PGA |
| Package_Equivalence_Code | PGA160M,15X15 |
| Package_Shape | Square |
| Package_Style | GRID ARRAY |
| Programmable_Logic_Type | EE PLD |
| Propagation_Delay | 20.000 |
| Seated_Height_Max | 5.3400 |
| Supply_Voltage_Max | 5.50000 |
| Supply_Voltage_Min | 4.50000 |
| Supply_Voltage_Nom | 5 |
| Surface_Mount | No |
| Terminal_Form | PIN/PEG |
| Terminal_Pitch | 2.540 |
| Terminal_Position | Perpendicular |