EPM7192EGC160-12P
EE PLD, 12ns, 192-Cell, CMOS, CPGA160Manufacturer: Altera
Categories: Programmable Logic Devices
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The Altera EPM7192EGC160-12P is an EE PLD from the EPM7192 series, featuring a 12ns propagation delay and 192 macrocells. This CMOS device offers 120 configurable I/O lines, supporting operation with 3.3V or 5V logic. It is housed in a 160-pin Ceramic Pin Grid Array (CPGA) package. With a maximum clock frequency of 90.9 MHz and a supply voltage range of 4.75V to 5.25V, this component is suitable for applications in telecommunications, industrial control, and consumer electronics. Its organization includes 120 inputs and 120 outputs, with the output function implemented via macrocells. The device operates within a temperature range of 0°C to 70°C.
Additional Information
Series: EPM7192RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Width | 39.6240 |
| Technology | CMOS |
| Length | 39.6240 |
| Additional_Feature | CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V |
| Clock_Frequency_Max | 90.90000 |
| In_System_Programmable | No |
| JESD_30_Code | S-CPGA-P160 |
| JTAG_BST | No |
| Number_of_Dedicated_Inputs | 0 |
| Number_of_I_O_Lines | 120 |
| Number_of_Inputs | 120 |
| Number_of_Macro_Cells | 192 |
| Number_of_Outputs | 120 |
| Number_of_Terminals | 160 |
| Operating_Temperature_Max | 70.0 |
| Operating_Temperature_Min | 0.0 |
| Organization | 0 DEDICATED INPUTS, 120 I/O |
| Output_Function | MACROCELL |
| Package_Body_Material | CERAMIC, METAL-SEALED COFIRED |
| Package_Code | PGA |
| Package_Equivalence_Code | PGA160M,15X15 |
| Package_Shape | Square |
| Package_Style | GRID ARRAY |
| Programmable_Logic_Type | EE PLD |
| Propagation_Delay | 12.000 |
| Seated_Height_Max | 5.3400 |
| Supply_Voltage_Max | 5.25000 |
| Supply_Voltage_Min | 4.75000 |
| Supply_Voltage_Nom | 5 |
| Surface_Mount | No |
| Terminal_Form | PIN/PEG |
| Terminal_Pitch | 2.540 |
| Terminal_Position | Perpendicular |
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