EPM7160QC100-12
EE PLD, 12ns, 160-Cell, CMOS, PQFP100Manufacturer: Altera
Categories: Programmable Logic Devices
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Altera EPM7150 series EE PLD, part number EPM7160QC100-12, offers a 12ns propagation delay and 160 macrocells. This CMOS device, packaged in a 100-pin PQFP (JESD-30 Code R-PQFP-G100), features 80 I/O lines and shared input/clock capabilities. Operating within a 4.75V to 5.25V supply range, its maximum clock frequency is 90.9 MHz. The EPM7160QC100-12 is suitable for applications in industrial, communications, and computing sectors requiring flexible logic implementation.
Additional Information
Series: EPM7160RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Width | 14.0000 |
| Technology | CMOS |
| Length | 20.0000 |
| Additional_Feature | 160 MACROCELLS; SHARED INPUT/CLOCK |
| Clock_Frequency_Max | 90.90000 |
| In_System_Programmable | No |
| JESD_30_Code | R-PQFP-G100 |
| JTAG_BST | No |
| Number_of_Dedicated_Inputs | 0 |
| Number_of_I_O_Lines | 80 |
| Number_of_Macro_Cells | 160 |
| Number_of_Terminals | 100 |
| Operating_Temperature_Max | 70.0 |
| Operating_Temperature_Min | 0.0 |
| Organization | 0 DEDICATED INPUTS, 80 I/O |
| Output_Function | MACROCELL |
| Package_Body_Material | PLASTIC/EPOXY |
| Package_Code | QFP |
| Package_Equivalence_Code | QFP100,.7X.9 |
| Package_Shape | Rectangular |
| Package_Style | FlatPack |
| Programmable_Logic_Type | EE PLD |
| Propagation_Delay | 12.000 |
| Seated_Height_Max | 3.4250 |
| Supply_Voltage_Max | 5.25000 |
| Supply_Voltage_Min | 4.75000 |
| Supply_Voltage_Nom | 5 |
| Surface_Mount | Yes |
| Terminal_Form | Gull Wing |
| Terminal_Pitch | 0.650 |
| Terminal_Position | QUAD |
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