EPM7128LC84-10
EE PLD, 10ns, 128-Cell, CMOS, PQCC84Manufacturer: Altera
Categories: Programmable Logic Devices
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The Altera EPM7128 is a CMOS EE PLD from the EPM7128 series, featuring 128 macrocells and a maximum clock frequency of 100 MHz. This component offers a propagation delay of 10ns and is housed in an 84-terminal PQCC84 package (JESD-30 Code: S-PQCC-J84). It provides 64 I/O lines and operates within a supply voltage range of 4.75V to 5.25V, with a nominal voltage of 5V. The device is designed for surface mounting with a terminal pitch of 1.270mm. Typical applications include industrial automation and telecommunications infrastructure. Operating temperature ranges from 0°C to 70°C.
Additional Information
Series: EPM7128RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Length | 29.3116 |
| Width | 29.3116 |
| Technology | CMOS |
| Additional_Feature | 128 MACROCELLS; SHARED INPUT/CLOCK |
| Clock_Frequency_Max | 100.00000 |
| In_System_Programmable | No |
| JESD_30_Code | S-PQCC-J84 |
| JTAG_BST | No |
| Number_of_Dedicated_Inputs | 0 |
| Number_of_I_O_Lines | 64 |
| Number_of_Macro_Cells | 128 |
| Number_of_Terminals | 84 |
| Operating_Temperature_Max | 70.0 |
| Operating_Temperature_Min | 0.0 |
| Organization | 0 DEDICATED INPUTS, 64 I/O |
| Output_Function | MACROCELL |
| Package_Body_Material | PLASTIC/EPOXY |
| Package_Code | QCCJ |
| Package_Equivalence_Code | LDCC84,1.2SQ |
| Package_Shape | Square |
| Package_Style | CHIP CARRIER |
| Programmable_Logic_Type | EE PLD |
| Propagation_Delay | 10.000 |
| Seated_Height_Max | 5.0800 |
| Supply_Voltage_Max | 5.25000 |
| Supply_Voltage_Min | 4.75000 |
| Supply_Voltage_Nom | 5 |
| Surface_Mount | Yes |
| Terminal_Form | J BEND |
| Terminal_Pitch | 1.270 |
| Terminal_Position | QUAD |