EPM7128AEFC100-6
EE PLD, 6ns, 128-Cell, CMOS, PBGA100Manufacturer: Altera
Categories: Programmable Logic Devices
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Altera EPM7128AEFC100-6 is a 128-macrocell EE PLD from the EPM7128 series, featuring 6ns propagation delay and CMOS technology. This device operates from a 3.0V to 3.6V supply voltage, with a nominal 3.3V. It offers 84 I/O lines and is configured in a 100-terminal PBGA package with a 1.000mm terminal pitch. The EPM7128AEFC100-6 supports in-system programming and JTAG Boundary Scan Test (BST), making it suitable for applications in industrial control, telecommunications, and consumer electronics. Its maximum operating temperature is 70.0°C.
Additional Information
Series: EPM7128RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Length | 11.0000 |
| Width | 11.0000 |
| Technology | CMOS |
| Additional_Feature | Yes |
| Clock_Frequency_Max | 166.70000 |
| In_System_Programmable | Yes |
| JESD_30_Code | S-PBGA-B100 |
| JTAG_BST | Yes |
| Number_of_Dedicated_Inputs | 0 |
| Number_of_I_O_Lines | 84 |
| Number_of_Inputs | 84 |
| Number_of_Macro_Cells | 128 |
| Number_of_Outputs | 84 |
| Number_of_Terminals | 100 |
| Operating_Temperature_Max | 70.0 |
| Operating_Temperature_Min | 0.0 |
| Organization | 0 DEDICATED INPUTS, 84 I/O |
| Output_Function | MACROCELL |
| Package_Body_Material | PLASTIC/EPOXY |
| Package_Code | TBGA |
| Package_Equivalence_Code | BGA100,10X10,40 |
| Package_Shape | Square |
| Package_Style | GRID ARRAY, THIN PROFILE |
| Programmable_Logic_Type | EE PLD |
| Propagation_Delay | 6.000 |
| Seated_Height_Max | 1.1000 |
| Supply_Voltage_Max | 3.60000 |
| Supply_Voltage_Min | 3.00000 |
| Supply_Voltage_Nom | 3.3 |
| Surface_Mount | Yes |
| Terminal_Form | Ball |
| Terminal_Pitch | 1.000 |
| Terminal_Position | Bottom |