EPM7128ABC100-6
EE PLD, 6ns, CMOS, PBGA100Manufacturer: Altera
Categories: Programmable Logic Devices
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The Altera EPM7128ABC100-6 is a 128 macrocell EE PLD built on CMOS technology. This device features a maximum clock frequency of 166.7 MHz and a propagation delay of 6 ns. It offers 84 I/O lines within a 100-terminal PBGA package, specifically a square grid array with bottom-positioned ball terminals. The operating temperature range is from 0°C to 70°C, with a supply voltage range of 3.0V to 3.6V. This programmable logic device is suitable for applications in industrial automation, telecommunications, and consumer electronics.
Additional Information
Series: EPM7128RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Technology | CMOS |
| Additional_Feature | 128 MACROCELLS |
| Clock_Frequency_Max | 166.70000 |
| JESD_30_Code | S-PBGA-B100 |
| Number_of_Dedicated_Inputs | 0 |
| Number_of_I_O_Lines | 84 |
| Number_of_Terminals | 100 |
| Operating_Temperature_Max | 70.0 |
| Operating_Temperature_Min | 0.0 |
| Organization | 0 DEDICATED INPUTS, 84 I/O |
| Output_Function | MACROCELL |
| Package_Body_Material | PLASTIC/EPOXY |
| Package_Code | BGA |
| Package_Shape | Square |
| Package_Style | GRID ARRAY |
| Programmable_Logic_Type | EE PLD |
| Propagation_Delay | 6.000 |
| Supply_Voltage_Max | 3.60000 |
| Supply_Voltage_Min | 3.00000 |
| Supply_Voltage_Nom | 3.3 |
| Surface_Mount | Yes |
| Terminal_Form | Ball |
| Terminal_Position | Bottom |
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