EPM7096LI68-7
EE PLD, 7.5ns, 96-Cell, CMOS, PQCC68Manufacturer: Altera
Categories: Programmable Logic Devices
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The Altera EPM7096LI68-7 is an EE PLD from the EPM7096 series, featuring 96 macrocells and a 7.5ns propagation delay. This CMOS device operates within a supply voltage range of 4.5V to 5.5V, with a nominal 5V requirement. It offers 52 I/O lines and is housed in a 68-pin PQCC (JESD-30 Code S-PQCC-J68) package, suitable for surface mounting. The operating temperature range is from -40°C to +85°C. This component finds application in various industrial sectors, including telecommunications, computing, and consumer electronics, where flexible logic implementation is critical. The maximum clock frequency achievable is 166.7 MHz.
Additional Information
Series: EPM7096RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Length | 24.2300 |
| Width | 24.2300 |
| Technology | CMOS |
| Additional_Feature | 96 MACROCELLS |
| Clock_Frequency_Max | 166.70000 |
| In_System_Programmable | No |
| JESD_30_Code | S-PQCC-J68 |
| JTAG_BST | No |
| Number_of_Dedicated_Inputs | 0 |
| Number_of_I_O_Lines | 52 |
| Number_of_Inputs | 52 |
| Number_of_Macro_Cells | 96 |
| Number_of_Outputs | 52 |
| Number_of_Terminals | 68 |
| Operating_Temperature_Max | 85.0 |
| Operating_Temperature_Min | -40.0 |
| Organization | 0 DEDICATED INPUTS, 52 I/O |
| Output_Function | MACROCELL |
| Package_Body_Material | PLASTIC/EPOXY |
| Package_Code | QCCJ |
| Package_Equivalence_Code | LDCC68,1.0SQ |
| Package_Shape | Square |
| Package_Style | CHIP CARRIER |
| Programmable_Logic_Type | EE PLD |
| Propagation_Delay | 7.500 |
| Seated_Height_Max | 5.0800 |
| Supply_Voltage_Max | 5.50000 |
| Supply_Voltage_Min | 4.50000 |
| Supply_Voltage_Nom | 5 |
| Surface_Mount | Yes |
| Terminal_Form | J BEND |
| Terminal_Pitch | 1.270 |
| Terminal_Position | QUAD |
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