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EPM7064SLC68-7

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EPM7064SLC68-7

EE PLD, 7.5ns, 64-Cell, CMOS, PQCC68

Manufacturer: Altera

Categories: Programmable Logic Devices

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The Altera EPM7064SLC68-7 is a 7.5ns EE PLD from the EPM7064 series, featuring 64 macrocells and a CMOS technology. This device offers configurable I/O operation supporting both 3.3V and 5V logic, with a maximum clock frequency of 125 MHz. It provides 48 I/O lines and operates within a temperature range of 0°C to 70°C, supplied by a nominal 5V with a maximum of 5.25V. Packaged in a J-leaded square chip carrier (PQCC68) with a terminal pitch of 1.27mm, this surface-mount component is suitable for applications in industrial automation, telecommunications, and consumer electronics. The device is in-system programmable, facilitating design iteration and field updates.

Additional Information

Series: EPM7064RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:
Technical Details:
Width24.2300
TechnologyCMOS
Length24.2300
Additional_FeatureCONFIGURABLE I/O OPERATION WITH 3.3V OR 5V
Clock_Frequency_Max125.00000
In_System_ProgrammableYes
JESD_30_CodeS-PQCC-J68
JTAG_BSTNo
Number_of_Dedicated_Inputs0
Number_of_I_O_Lines48
Number_of_Macro_Cells64
Number_of_Terminals68
Operating_Temperature_Max70.0
Operating_Temperature_Min0.0
Organization0 DEDICATED INPUTS, 48 I/O
Output_FunctionMACROCELL
Package_Body_MaterialPLASTIC/EPOXY
Package_CodeQCCJ
Package_Equivalence_CodeLDCC68,1.0SQ
Package_ShapeSquare
Package_StyleCHIP CARRIER
Programmable_Logic_TypeEE PLD
Propagation_Delay7.500
Seated_Height_Max5.0800
Supply_Voltage_Max5.25000
Supply_Voltage_Min4.75000
Supply_Voltage_Nom5
Surface_MountYes
Terminal_FormJ BEND
Terminal_Pitch1.270
Terminal_PositionQUAD

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