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EPM7064LI68-10

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EPM7064LI68-10

EE PLD, 10ns, 64-Cell, CMOS, PQCC68

Manufacturer: Altera

Categories: Programmable Logic Devices

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The Altera EPM7064LI68-10 is a high-performance MAX 7000 series EE PLD featuring 64 macrocells and an inherent propagation delay of 10ns. This device supports configurable I/O operation with 3.3V or 5V compatibility, enabling flexible system integration. With 48 I/O lines and a maximum clock frequency of 100 MHz, it is suitable for applications in telecommunications, industrial control, and consumer electronics. The component utilizes advanced CMOS technology and is housed in a J-Leaded Square Chip Carrier (PQCC68) package, measuring 24.23mm in length and width with a seated height of 5.08mm. It operates within a temperature range of -40°C to 85°C and requires a supply voltage between 4.5V and 5.5V.

Additional Information

Series: EPM7064RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:
Technical Details:
Length24.2316
Width24.2316
TechnologyCMOS
Additional_FeatureCONFIGURABLE I/O OPERATION WITH 3.3V OR 5V
Clock_Frequency_Max100.00000
In_System_ProgrammableNo
JESD_30_CodeS-PQCC-J68
JTAG_BSTNo
Number_of_Dedicated_Inputs0
Number_of_I_O_Lines48
Number_of_Inputs48
Number_of_Macro_Cells64
Number_of_Outputs48
Number_of_Terminals68
Operating_Temperature_Max85.0
Operating_Temperature_Min-40.0
Organization0 DEDICATED INPUTS, 48 I/O
Output_FunctionMACROCELL
Package_Body_MaterialPLASTIC/EPOXY
Package_CodeQCCJ
Package_Equivalence_CodeLDCC68,1.0SQ
Package_ShapeSquare
Package_StyleCHIP CARRIER
Programmable_Logic_TypeEE PLD
Propagation_Delay10.000
Seated_Height_Max5.0800
Supply_Voltage_Max5.50000
Supply_Voltage_Min4.50000
Supply_Voltage_Nom5
Surface_MountYes
Terminal_FormJ BEND
Terminal_Pitch1.270
Terminal_PositionQUAD

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