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EPM7064BFC256-3

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EPM7064BFC256-3

EE PLD, 3.5ns, 64-Cell, CMOS, PBGA256

Manufacturer: Altera

Categories: Programmable Logic Devices

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Altera EPM7064BFC256-3 is an EE PLD from the EPM7064 series, featuring 64 macrocells and a propagation delay of 3.5ns. This CMOS device operates with a nominal supply voltage of 2.5V, ranging from 2.375V to 2.625V. It offers 68 I/O lines and 4 dedicated inputs, with an organization of 4 dedicated inputs and 68 I/O. The component is housed in a 256-ball grid array (BGA) package (JESD-30 code S-PBGA-B256) with a 1.000mm terminal pitch, adhering to a square package shape and grid array style. In-system programmability and JTAG Boundary Scan Test (BST) are supported. This device finds application in industrial automation, medical equipment, and telecommunications systems. The maximum clock frequency is 277.80000 MHz.

Additional Information

Series: EPM7064RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:
Technical Details:
Length17.0000
Width17.0000
TechnologyCMOS
Additional_FeatureYes
Clock_Frequency_Max277.80000
In_System_ProgrammableYes
JESD_30_CodeS-PBGA-B256
JTAG_BSTYes
Number_of_Dedicated_Inputs4
Number_of_I_O_Lines68
Number_of_Macro_Cells64
Number_of_Terminals256
Organization4 DEDICATED INPUTS, 68 I/O
Output_FunctionMACROCELL
Package_Body_MaterialPLASTIC/EPOXY
Package_CodeBGA
Package_Equivalence_CodeBGA256,16X16,40
Package_ShapeSquare
Package_StyleGRID ARRAY
Programmable_Logic_TypeEE PLD
Propagation_Delay3.500
Seated_Height_Max2.1000
Supply_Voltage_Max2.62500
Supply_Voltage_Min2.37500
Supply_Voltage_Nom2.5
Surface_MountYes
Terminal_FormBall
Terminal_Pitch1.000
Terminal_PositionBottom

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