EPM7064ALC84-10
EE PLD, 10ns, CMOS, PQCC84Manufacturer: Altera
Categories: Programmable Logic Devices
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The Altera EPM7064ALC84-10 is an electrically erasable Programmable Logic Device (EE PLD) from the EPM7064 series. This CMOS device features 64 macrocells and 4 Logic Array Blocks (LABs), offering configurable I/O operation supporting 2.5V or 3.3V signaling. With a maximum clock frequency of 125MHz and a propagation delay of 10ns, it provides 68 I/O lines within an 84-terminal PQCC84 package (JESD-30 code S-PQCC-J84). Operating within a temperature range of 0°C to 70°C, it requires a supply voltage between 3.0V and 3.6V, typically nominal 3.3V. This surface-mount component is utilized in industrial automation, telecommunications, and consumer electronics applications.
Additional Information
Series: EPM7064RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Length | 29.3116 |
| Width | 29.3116 |
| Technology | CMOS |
| Additional_Feature | 64 MACROCELLS; 4 LABS; CONFIGURABLE I/O OPERATION WITH 2.5V OR 3.3V |
| Clock_Frequency_Max | 125.00000 |
| JESD_30_Code | S-PQCC-J84 |
| Number_of_Dedicated_Inputs | 0 |
| Number_of_I_O_Lines | 68 |
| Number_of_Terminals | 84 |
| Operating_Temperature_Max | 70.0 |
| Operating_Temperature_Min | 0.0 |
| Organization | 0 DEDICATED INPUTS, 68 I/O |
| Output_Function | MACROCELL |
| Package_Body_Material | PLASTIC/EPOXY |
| Package_Code | QCCJ |
| Package_Shape | Square |
| Package_Style | CHIP CARRIER |
| Programmable_Logic_Type | EE PLD |
| Propagation_Delay | 10.000 |
| Seated_Height_Max | 5.0800 |
| Supply_Voltage_Max | 3.60000 |
| Supply_Voltage_Min | 3.00000 |
| Supply_Voltage_Nom | 3.3 |
| Surface_Mount | Yes |
| Terminal_Form | J BEND |
| Terminal_Pitch | 1.270 |
| Terminal_Position | QUAD |
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