EPM7064AELI84-10
EE PLD, 10ns, 64-Cell, CMOS, PQCC84Manufacturer: Altera
Categories: Programmable Logic Devices
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Altera EPM7064AELI84-10 is an EE PLD from the EPM7064 series, featuring a 10ns propagation delay and 64 macrocells. This CMOS device operates with a supply voltage range of 3.0V to 3.6V, with a nominal 3.3V. Offered in an 84-terminal PQCC package (JESD-30 Code S-PQCC-J84), it provides 68 I/O lines. The device supports in-system programmability and includes JTAG Boundary Scan Test (BST) functionality. Its maximum clock frequency is 125MHz. This programmable logic device is suitable for applications in the industrial, consumer electronics, and telecommunications sectors.
Additional Information
Series: EPM7064RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Width | 29.3116 |
| Technology | CMOS |
| Length | 29.3116 |
| Additional_Feature | 64 MACROCELLS |
| Clock_Frequency_Max | 125.00000 |
| In_System_Programmable | Yes |
| JESD_30_Code | S-PQCC-J84 |
| JTAG_BST | Yes |
| Number_of_Dedicated_Inputs | 0 |
| Number_of_I_O_Lines | 68 |
| Number_of_Macro_Cells | 64 |
| Number_of_Terminals | 84 |
| Operating_Temperature_Max | 85.0 |
| Operating_Temperature_Min | -40.0 |
| Organization | 0 DEDICATED INPUTS, 68 I/O |
| Output_Function | MACROCELL |
| Package_Body_Material | PLASTIC/EPOXY |
| Package_Code | QCCJ |
| Package_Equivalence_Code | LDCC84,1.2SQ |
| Package_Shape | Square |
| Package_Style | CHIP CARRIER |
| Programmable_Logic_Type | EE PLD |
| Propagation_Delay | 10.000 |
| Seated_Height_Max | 5.0800 |
| Supply_Voltage_Max | 3.60000 |
| Supply_Voltage_Min | 3.00000 |
| Supply_Voltage_Nom | 3.3 |
| Surface_Mount | Yes |
| Terminal_Form | J BEND |
| Terminal_Pitch | 1.270 |
| Terminal_Position | QUAD |
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