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EPM7064AELC84-4

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EPM7064AELC84-4

EE PLD, 4.5ns, 64-Cell, CMOS, PQCC84

Manufacturer: Altera

Categories: Programmable Logic Devices

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The Altera EPM7064AELC84-4 is a high-performance EE PLD from the EPM7064 series, featuring 64 macrocells and 64 input/output lines. This CMOS device operates with a supply voltage range of 3.0V to 3.6V, nominal 3.3V, and boasts a maximum clock frequency of 250 MHz. Its propagation delay is rated at 4.5 ns. The component is in-system programmable and supports JTAG boundary scan testing. Housed in an 84-terminal, square PQCC84 package (JESD-30 Code S-PQCC-J84), it is designed for surface mounting with a terminal pitch of 1.270 mm. This device is suitable for applications in telecommunications, industrial control, and consumer electronics, where flexible logic implementation is required. The operating temperature range is 0°C to 70°C.

Additional Information

Series: EPM7064RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:
Technical Details:
Length29.3116
Width29.3116
TechnologyCMOS
Additional_FeatureYes
Clock_Frequency_Max250.00000
In_System_ProgrammableYes
JESD_30_CodeS-PQCC-J84
JTAG_BSTYes
Number_of_Dedicated_Inputs0
Number_of_I_O_Lines64
Number_of_Macro_Cells64
Number_of_Terminals84
Operating_Temperature_Max70.0
Operating_Temperature_Min0.0
Organization0 DEDICATED INPUTS, 64 I/O
Output_FunctionMACROCELL
Package_Body_MaterialPLASTIC/EPOXY
Package_CodeQCCJ
Package_Equivalence_CodeLDCC84,1.2SQ
Package_ShapeSquare
Package_StyleCHIP CARRIER
Programmable_Logic_TypeEE PLD
Propagation_Delay4.500
Seated_Height_Max5.0800
Supply_Voltage_Max3.60000
Supply_Voltage_Min3.00000
Supply_Voltage_Nom3.3
Surface_MountYes
Terminal_FormJ BEND
Terminal_Pitch1.270
Terminal_PositionQUAD

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