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EPM7032JC44-12

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EPM7032JC44-12

EE PLD, 12ns, 32-Cell, CMOS, PQCC44

Manufacturer: Altera

Categories: Programmable Logic Devices

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The Altera EPM7032JC44-12 is an electrically erasable Programmable Logic Device (PLD) from the EPM7032 series. This CMOS device features 32 macrocells and offers 36 input/output lines, with 36 dedicated inputs. It operates with a maximum clock frequency of 125 MHz and a propagation delay of 12 ns. The EPM7032JC44-12 is housed in a 44-pin PQCC package (JESD-30 Code: S-PQCC-J44) with a terminal pitch of 1.270 mm, designed for surface mounting. It requires a supply voltage range of 4.75 V to 5.25 V and operates within a temperature range of 0°C to 70°C. This component is utilized in various industrial applications, including telecommunications and consumer electronics.

Additional Information

Series: EPM7032RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:
Technical Details:
Width16.5862
TechnologyCMOS
Length16.5862
Additional_FeatureNo
Clock_Frequency_Max125.00000
In_System_ProgrammableNo
JESD_30_CodeS-PQCC-J44
JTAG_BSTNo
Number_of_Dedicated_Inputs0
Number_of_I_O_Lines36
Number_of_Inputs36
Number_of_Macro_Cells32
Number_of_Outputs36
Number_of_Terminals44
Operating_Temperature_Max70.0
Operating_Temperature_Min0.0
Organization0 DEDICATED INPUTS, 36 I/O
Output_FunctionMACROCELL
Package_Body_MaterialPLASTIC/EPOXY
Package_CodeQCCJ
Package_Equivalence_CodeLDCC44,.7SQ
Package_ShapeSquare
Package_StyleCHIP CARRIER
Programmable_Logic_TypeEE PLD
Propagation_Delay12.000
Seated_Height_Max4.5720
Supply_Voltage_Max5.25000
Supply_Voltage_Min4.75000
Supply_Voltage_Nom5
Surface_MountYes
Terminal_FormJ BEND
Terminal_Pitch1.270
Terminal_PositionQUAD

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