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EPM5130QM

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EPM5130QM

OT PLD, 55ns, 128-Cell, CMOS, PQFP100

Manufacturer: Altera

Categories: Programmable Logic Devices

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Altera EPM5130 MAX 5000 series device, part number EPM5130QM. This OT PLD features 128 macrocells and is constructed using CMOS technology. It offers 19 dedicated inputs and 48 I/O lines, with a total of 68 inputs and 48 outputs. The device supports a maximum clock frequency of 33.3 MHz and has a propagation delay of 55 ns. Operating within a temperature range of -55°C to 125°C, it is housed in a 100-pin PQFP (Plastic Quad Flat Pack) package with a terminal pitch of 0.65 mm. Screening level reference standards include 38535Q/M, 38534H, and 883B. This component is utilized in various industrial and telecommunications applications.

Additional Information

Series: EPM5130RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:
Technical Details:
Length20.0000
Width14.0000
TechnologyCMOS
Additional_FeatureLABS INTERCONNECTED BY PIA; 8 LABS; 128 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK
Clock_Frequency_Max33.30000
In_System_ProgrammableNo
JESD_30_CodeR-PQFP-G100
JTAG_BSTNo
Number_of_Dedicated_Inputs19
Number_of_I_O_Lines48
Number_of_Inputs68
Number_of_Macro_Cells128
Number_of_Outputs48
Number_of_Terminals100
Operating_Temperature_Max125.0
Operating_Temperature_Min-55.0
Organization19 DEDICATED INPUTS, 48 I/O
Output_FunctionMACROCELL
Package_Body_MaterialPLASTIC/EPOXY
Package_CodeQFP
Package_Equivalence_CodeQFP100,.7X.9
Package_ShapeRectangular
Package_StyleFlatPack
Programmable_Logic_TypeOT PLD
Propagation_Delay55.000
Screening_Level_Reference_Standard38535Q/M;38534H;883B
Seated_Height_Max3.6500
Supply_Voltage_Max5.50000
Supply_Voltage_Min4.50000
Supply_Voltage_Nom5
Surface_MountYes
Terminal_FormGull Wing
Terminal_Pitch0.650
Terminal_PositionQUAD

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