EPM5130LC-2
OT PLD, 45ns, 128-Cell, CMOS, PQCC84Manufacturer: Altera
Categories: Programmable Logic Devices
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Altera's EPM5130LC-2 is a 128-macrocell MAX 5000 family CPLD, manufactured using CMOS technology. This device features 8 LABs interconnected by a Programmable Interconnect Array (PIA) and offers 48 I/O lines with 19 dedicated inputs. It operates with a maximum clock frequency of 40 MHz and a propagation delay of 45 ns. The EPM5130LC-2 is housed in an 84-terminal PQCC package (JESD-30 Code: S-PQCC-J84) with a terminal pitch of 1.27 mm. It requires a supply voltage range of 4.75V to 5.25V. This component is suitable for applications in industrial control, communication systems, and consumer electronics.
Additional Information
Series: EPM5130RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Length | 29.3116 |
| Width | 29.3116 |
| Technology | CMOS |
| Additional_Feature | LABS INTERCONNECTED BY PIA; 8 LABS; 128 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK |
| Clock_Frequency_Max | 40.00000 |
| In_System_Programmable | No |
| JESD_30_Code | S-PQCC-J84 |
| JTAG_BST | No |
| Number_of_Dedicated_Inputs | 19 |
| Number_of_I_O_Lines | 48 |
| Number_of_Inputs | 68 |
| Number_of_Macro_Cells | 128 |
| Number_of_Outputs | 48 |
| Number_of_Terminals | 84 |
| Operating_Temperature_Max | 70.0 |
| Operating_Temperature_Min | 0.0 |
| Organization | 19 DEDICATED INPUTS, 48 I/O |
| Output_Function | MACROCELL |
| Package_Body_Material | PLASTIC/EPOXY |
| Package_Code | QCCJ |
| Package_Equivalence_Code | LDCC84,1.2SQ |
| Package_Shape | Square |
| Package_Style | CHIP CARRIER |
| Programmable_Logic_Type | OT PLD |
| Propagation_Delay | 45.000 |
| Seated_Height_Max | 5.0800 |
| Supply_Voltage_Max | 5.25000 |
| Supply_Voltage_Min | 4.75000 |
| Supply_Voltage_Nom | 5 |
| Surface_Mount | Yes |
| Terminal_Form | J BEND |
| Terminal_Pitch | 1.270 |
| Terminal_Position | QUAD |
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