EPM5130GI100
UV PLD, 55ns, CMOS, CPGA100Manufacturer: Altera
Categories: Programmable Logic Devices
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Altera EPM5130GI100 is a UV Programmable Logic Device (PLD) from the EPM5130 series, featuring 128 macrocells. This CMOS device operates with a maximum clock frequency of 33.3 MHz and a propagation delay of 55 ns. It offers 19 dedicated inputs and 64 I/O lines, with shared input/clock and shared product terms for flexible design. The component is housed in a 100-pin Ceramic Pin Grid Array (CPGA) package with a square shape and a terminal pitch of 2.54 mm. Operating within a supply voltage range of 4.5V to 5.5V, it is suitable for applications requiring robust and reliable logic implementation. This device finds application in various industrial and telecommunications systems.
Additional Information
Series: EPM5130RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Length | 33.5280 |
| Width | 33.5280 |
| Technology | CMOS |
| Additional_Feature | 128 MACROCELLS; SHARED INPUT/CLOCK; SHARED PRODUCT TERMS |
| Clock_Frequency_Max | 33.30000 |
| JESD_30_Code | S-CPGA-P100 |
| Number_of_Dedicated_Inputs | 19 |
| Number_of_I_O_Lines | 64 |
| Number_of_Terminals | 100 |
| Operating_Temperature_Max | 85.0 |
| Operating_Temperature_Min | -40.0 |
| Organization | 19 DEDICATED INPUTS, 64 I/O |
| Output_Function | MACROCELL |
| Package_Body_Material | CERAMIC, METAL-SEALED COFIRED |
| Package_Code | WPGA |
| Package_Equivalence_Code | PGA100M,13X13 |
| Package_Shape | Square |
| Package_Style | GRID ARRAY, WINDOW |
| Programmable_Logic_Type | UV PLD |
| Propagation_Delay | 55.000 |
| Seated_Height_Max | 4.9600 |
| Supply_Voltage_Max | 5.50000 |
| Supply_Voltage_Min | 4.50000 |
| Supply_Voltage_Nom | 5 |
| Surface_Mount | No |
| Terminal_Form | PIN/PEG |
| Terminal_Pitch | 2.540 |
| Terminal_Position | Perpendicular |
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