EPM5130G5962
UV PLD, 55ns, CMOS, CPGA100Manufacturer: Altera
Categories: Programmable Logic Devices
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Altera EPM5130 series UV PLD, part number EPM5130G5962, offers 128 macrocells within 8 LABs interconnected by a Programmable Interconnect Array (PIA). This CMOS device features 19 dedicated inputs and 64 I/O lines, operating with a nominal supply voltage of 5V (4.5V to 5.5V). The propagation delay is rated at 55ns, with a maximum clock frequency of 33.3 MHz. Designed for demanding environments, it operates across a temperature range of -55°C to 125°C. The component is housed in a 100-terminal ceramic, metal-sealed cofired grid array package (CPGA100) with a terminal pitch of 2.54mm. This device is suitable for applications in industrial controls and telecommunications requiring robust programmable logic solutions.
Additional Information
Series: EPM5130RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Width | 33.5280 |
| Technology | CMOS |
| Length | 33.5280 |
| Additional_Feature | LABS INTERCONNECTED BY PIA; 8 LABS; 128 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK |
| Clock_Frequency_Max | 33.30000 |
| JESD_30_Code | S-CPGA-P100 |
| Number_of_Dedicated_Inputs | 19 |
| Number_of_I_O_Lines | 64 |
| Number_of_Terminals | 100 |
| Operating_Temperature_Max | 125.0 |
| Operating_Temperature_Min | -55.0 |
| Organization | 19 DEDICATED INPUTS, 64 I/O |
| Output_Function | MACROCELL |
| Package_Body_Material | CERAMIC, METAL-SEALED COFIRED |
| Package_Code | WPGA |
| Package_Equivalence_Code | PGA100M,13X13 |
| Package_Shape | Square |
| Package_Style | GRID ARRAY, WINDOW |
| Programmable_Logic_Type | UV PLD |
| Propagation_Delay | 55.000 |
| Seated_Height_Max | 3.8100 |
| Supply_Voltage_Max | 5.50000 |
| Supply_Voltage_Min | 4.50000 |
| Supply_Voltage_Nom | 5 |
| Surface_Mount | No |
| Terminal_Form | PIN/PEG |
| Terminal_Pitch | 2.540 |
| Terminal_Position | Perpendicular |
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