EPM5130ALC-15
OT PLD, 25ns, CMOS, PQCC84Manufacturer: Altera
Categories: Programmable Logic Devices
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Altera EPM5130 MAX II CPLD, part number EPM5130ALC-15, is a 5V CMOS device featuring 128 macrocells with 8 interconnectable LABs. This OT PLD offers 48 I/O lines and 19 dedicated inputs, with a maximum clock frequency of 83.3 MHz. It boasts a propagation delay of 25 ns and operates within a temperature range of 0°C to 70°C. The component is housed in an 84-terminal PQCC J-lead package (JESD-30 Code S-PQCC-J84) with a 1.270mm terminal pitch. Applications include industrial automation, communications infrastructure, and consumer electronics.
Additional Information
Series: EPM5130RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Length | 29.3116 |
| Width | 29.3116 |
| Technology | CMOS |
| Additional_Feature | LABS INTERCONNECTED BY PIA; 8 LABS; 128 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK |
| Clock_Frequency_Max | 83.30000 |
| JESD_30_Code | S-PQCC-J84 |
| Number_of_Dedicated_Inputs | 19 |
| Number_of_I_O_Lines | 48 |
| Number_of_Terminals | 84 |
| Operating_Temperature_Max | 70.0 |
| Operating_Temperature_Min | 0.0 |
| Organization | 19 DEDICATED INPUTS, 48 I/O |
| Output_Function | MACROCELL |
| Package_Body_Material | PLASTIC/EPOXY |
| Package_Code | QCCJ |
| Package_Shape | Square |
| Package_Style | CHIP CARRIER |
| Programmable_Logic_Type | OT PLD |
| Propagation_Delay | 25.000 |
| Seated_Height_Max | 5.0800 |
| Supply_Voltage_Max | 5.25000 |
| Supply_Voltage_Min | 4.75000 |
| Supply_Voltage_Nom | 5 |
| Surface_Mount | Yes |
| Terminal_Form | J BEND |
| Terminal_Pitch | 1.270 |
| Terminal_Position | QUAD |
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