EPM5130AGC-20
UV PLD, 33ns, CMOS, CPGA100Manufacturer: Altera
Categories: Programmable Logic Devices
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The Altera EPM5130AGC-20 is a UV Programmable Logic Device (PLD) from the EPM5130 series. This CMOS component features 128 macrocells organized with 8 LABs interconnected by a Programmable Interconnect Array (PIA). It supports 1 external clock and offers 19 dedicated inputs along with 64 I/O lines, totaling 100 terminals. The device boasts a maximum clock frequency of 66.7 MHz and a propagation delay of 33 ns. Operating within a temperature range of 0°C to 70°C, it requires a supply voltage between 4.75V and 5.25V. The EPM5130AGC-20 is housed in a 100-pin Ceramic Pin Grid Array (CPGA) package with a square shape and grid array style. This device finds application in various industrial and telecommunications systems.
Additional Information
Series: EPM5130RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Length | 33.5280 |
| Width | 33.5280 |
| Technology | CMOS |
| Additional_Feature | LABS INTERCONNECTED BY PIA; 8 LABS; 128 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK |
| Clock_Frequency_Max | 66.70000 |
| JESD_30_Code | S-CPGA-P100 |
| Number_of_Dedicated_Inputs | 19 |
| Number_of_I_O_Lines | 64 |
| Number_of_Terminals | 100 |
| Operating_Temperature_Max | 70.0 |
| Operating_Temperature_Min | 0.0 |
| Organization | 19 DEDICATED INPUTS, 64 I/O |
| Output_Function | MACROCELL |
| Package_Body_Material | CERAMIC, METAL-SEALED COFIRED |
| Package_Code | WPGA |
| Package_Equivalence_Code | PGA100M,13X13 |
| Package_Shape | Square |
| Package_Style | GRID ARRAY, WINDOW |
| Programmable_Logic_Type | UV PLD |
| Propagation_Delay | 33.000 |
| Seated_Height_Max | 3.8100 |
| Supply_Voltage_Max | 5.25000 |
| Supply_Voltage_Min | 4.75000 |
| Supply_Voltage_Nom | 5 |
| Surface_Mount | No |
| Terminal_Form | PIN/PEG |
| Terminal_Pitch | 2.540 |
| Terminal_Position | Perpendicular |
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