EPM5128LI68
OT PLD, 55ns, 128-Cell, CMOS, PQCC68Manufacturer: Altera
Categories: Programmable Logic Devices
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Altera's EPM5128LI68 is a 128-macrocell, CMOS, OT PLD device housed in a 68-pin PQCC package. This component features a typical propagation delay of 55ns and supports a maximum clock frequency of 33.3MHz. It offers 7 dedicated inputs and 52 I/O lines, totaling 60 input pins and 52 output functions. The EPM5128 series is suitable for applications in industrial control, telecommunications infrastructure, and consumer electronics, where flexible logic implementation is required. The device operates within a supply voltage range of 4.5V to 5.5V and an industrial temperature range of -40°C to 85°C. Its organization includes shared input/clock and shared product terms, enhancing design flexibility.
Additional Information
Series: EPM5128RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Length | 24.2300 |
| Width | 24.2300 |
| Technology | CMOS |
| Additional_Feature | 128 MACROCELLS; SHARED INPUT/CLOCK; SHARED PRODUCT TERMS |
| Clock_Frequency_Max | 33.30000 |
| In_System_Programmable | No |
| JESD_30_Code | S-PQCC-J68 |
| JTAG_BST | No |
| Number_of_Dedicated_Inputs | 7 |
| Number_of_I_O_Lines | 52 |
| Number_of_Inputs | 60 |
| Number_of_Macro_Cells | 128 |
| Number_of_Outputs | 52 |
| Number_of_Terminals | 68 |
| Operating_Temperature_Max | 85.0 |
| Operating_Temperature_Min | -40.0 |
| Organization | 7 DEDICATED INPUTS, 52 I/O |
| Output_Function | MACROCELL |
| Package_Body_Material | PLASTIC/EPOXY |
| Package_Code | QCCJ |
| Package_Equivalence_Code | LDCC68,1.0SQ |
| Package_Shape | Square |
| Package_Style | CHIP CARRIER |
| Programmable_Logic_Type | OT PLD |
| Propagation_Delay | 55.000 |
| Seated_Height_Max | 5.0800 |
| Supply_Voltage_Max | 5.50000 |
| Supply_Voltage_Min | 4.50000 |
| Supply_Voltage_Nom | 5 |
| Surface_Mount | Yes |
| Terminal_Form | J BEND |
| Terminal_Pitch | 1.270 |
| Terminal_Position | QUAD |
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