EPM5128GC-2
UV PLD, 45ns, 128-Cell, CMOS, CPGA68Manufacturer: Altera
Categories: Programmable Logic Devices
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Altera EPM5128 UV PLD, part number EPM5128GC-2, offers 128 macrocells with a 45ns propagation delay. This CMOS device operates within a 4.75V to 5.25V supply range and features 8 interconnected logic array blocks (LABs) with a Programmable Interconnect Array (PIA). It supports one external clock and includes shared inputs/clocks. The EPM5128GC-2 is presented in a 68-terminal ceramic, metal-sealed cofired pin grid array (CPGA) package, identified by JESD-30 code S-CPGA-P68. With 7 dedicated inputs and 52 I/O lines, it is suitable for applications requiring flexible logic implementation in industrial and telecommunications sectors. The device operates from 0°C to 70°C.
Additional Information
Series: EPM5128RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Width | 27.9400 |
| Technology | CMOS |
| Length | 27.9400 |
| Additional_Feature | LABS INTERCONNECTED BY PIA; 8 LABS; 128 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK |
| Clock_Frequency_Max | 50.00000 |
| In_System_Programmable | No |
| JESD_30_Code | S-CPGA-P68 |
| JTAG_BST | No |
| Number_of_Dedicated_Inputs | 7 |
| Number_of_I_O_Lines | 52 |
| Number_of_Macro_Cells | 128 |
| Number_of_Terminals | 68 |
| Operating_Temperature_Max | 70.0 |
| Operating_Temperature_Min | 0.0 |
| Organization | 7 DEDICATED INPUTS, 52 I/O |
| Output_Function | MACROCELL |
| Package_Body_Material | CERAMIC, METAL-SEALED COFIRED |
| Package_Code | WPGA |
| Package_Equivalence_Code | PGA68,11X11 |
| Package_Shape | Square |
| Package_Style | GRID ARRAY, WINDOW |
| Programmable_Logic_Type | UV PLD |
| Propagation_Delay | 45.000 |
| Seated_Height_Max | 4.9600 |
| Supply_Voltage_Max | 5.25000 |
| Supply_Voltage_Min | 4.75000 |
| Supply_Voltage_Nom | 5 |
| Surface_Mount | No |
| Terminal_Form | PIN/PEG |
| Terminal_Pitch | 2.540 |
| Terminal_Position | Perpendicular |
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