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EPM5064ALC-15

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EPM5064ALC-15

OT PLD, 25ns, CMOS, PQCC44

Manufacturer: Altera

Categories: Programmable Logic Devices

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The Altera EPM5064ALC-15 is an Old Technology Programmable Logic Device (OT PLD) from the EPM5064 series. This CMOS component features 64 macrocells organized with 7 dedicated inputs and 28 I/O lines. Interconnected by a Programmable Interconnect Array (PIA), the device offers 4 LABs and supports one external clock with shared input/clock functionality. With a maximum clock frequency of 83.3 MHz, its propagation delay is rated at 25 ns. The EPM5064ALC-15 is housed in a 44-terminal PQCC package (JESD-30 Code S-PQCC-J44) with J-bend terminals on a 1.270 mm pitch. Operating within a supply voltage range of 4.75V to 5.25V, this surface-mount device is designed for applications requiring robust programmable logic solutions. Its typical applications span industrial automation and communications infrastructure.

Additional Information

Series: EPM5064RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:
Technical Details:
Width16.5862
TechnologyCMOS
Length16.5862
Additional_FeatureLABS INTERCONNECTED BY PIA; 4 LABS; 64 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK
Clock_Frequency_Max83.30000
JESD_30_CodeS-PQCC-J44
Number_of_Dedicated_Inputs7
Number_of_I_O_Lines28
Number_of_Terminals44
Operating_Temperature_Max70.0
Operating_Temperature_Min0.0
Organization7 DEDICATED INPUTS, 28 I/O
Output_FunctionMACROCELL
Package_Body_MaterialPLASTIC/EPOXY
Package_CodeQCCJ
Package_ShapeSquare
Package_StyleCHIP CARRIER
Programmable_Logic_TypeOT PLD
Propagation_Delay25.000
Seated_Height_Max4.5700
Supply_Voltage_Max5.25000
Supply_Voltage_Min4.75000
Supply_Voltage_Nom5
Surface_MountYes
Terminal_FormJ BEND
Terminal_Pitch1.270
Terminal_PositionQUAD

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