EPM3256AQC208-6
EE PLD, 6ns, 256-Cell, CMOS, PQFP208Manufacturer: Altera
Categories: Programmable Logic Devices
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The Altera EPM3256AQC208-6 is a MAX II family EE PLD featuring 256 macrocells and a propagation delay of 6ns. This CMOS device operates within a supply voltage range of 3.0V to 3.6V, with a nominal voltage of 3.3V. It offers 158 I/O lines and supports in-system programmability via JTAG BST. The component is housed in a 208-pin PQFP package with a terminal pitch of 0.500mm, designed for surface mounting. Applications for this component include industrial automation, consumer electronics, and telecommunications. The operating temperature range is 0°C to 70°C.
Additional Information
Series: EPM3256RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Length | 28.0000 |
| Width | 28.0000 |
| Technology | CMOS |
| Additional_Feature | Yes |
| Clock_Frequency_Max | 166.70000 |
| In_System_Programmable | Yes |
| JESD_30_Code | S-PQFP-G208 |
| JTAG_BST | Yes |
| Number_of_Dedicated_Inputs | 0 |
| Number_of_I_O_Lines | 158 |
| Number_of_Macro_Cells | 256 |
| Number_of_Terminals | 208 |
| Operating_Temperature_Max | 70.0 |
| Operating_Temperature_Min | 0.0 |
| Organization | 0 DEDICATED INPUTS, 158 I/O |
| Output_Function | MACROCELL |
| Package_Body_Material | PLASTIC/EPOXY |
| Package_Code | FQFP |
| Package_Equivalence_Code | QFP208,1.2SQ,20 |
| Package_Shape | Square |
| Package_Style | FLATPACK, FINE PITCH |
| Programmable_Logic_Type | EE PLD |
| Propagation_Delay | 6.000 |
| Seated_Height_Max | 4.1000 |
| Supply_Voltage_Max | 3.60000 |
| Supply_Voltage_Min | 3.00000 |
| Supply_Voltage_Nom | 3.3 |
| Surface_Mount | Yes |
| Terminal_Form | Gull Wing |
| Terminal_Pitch | 0.500 |
| Terminal_Position | QUAD |
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