EPF10K50VFI484-4
Loadable PLD, 21.1ns, CMOS, PBGA484Manufacturer: Altera
Categories: Programmable Logic Devices
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The Altera EPF10K50VFI484-4 is a loadable PLD from the EPF10K50 series, featuring CMOS technology and a PBGA484 package. This device offers 291 I/O lines and 4 dedicated inputs, with a registered output function. Its propagation delay is 21.1ns, and it operates within a supply voltage range of 3.0V to 3.6V, with a nominal value of 3.3V. The operating temperature range is from -40°C to 85°C. This component is suitable for applications in telecommunications, industrial control, and consumer electronics. The JEDEC standard S-PBGA-B484 package is a square grid array with 484 terminals on a 1.000mm pitch.
Additional Information
Series: EPF10K50RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Width | 23.0000 |
| Technology | CMOS |
| Length | 23.0000 |
| JESD_30_Code | S-PBGA-B484 |
| Number_of_Dedicated_Inputs | 4 |
| Number_of_I_O_Lines | 291 |
| Number_of_Terminals | 484 |
| Operating_Temperature_Max | 85.0 |
| Operating_Temperature_Min | -40.0 |
| Organization | 4 DEDICATED INPUTS, 291 I/O |
| Output_Function | REGISTERED |
| Package_Body_Material | PLASTIC/EPOXY |
| Package_Code | BGA |
| Package_Shape | Square |
| Package_Style | GRID ARRAY |
| Programmable_Logic_Type | LOADABLE PLD |
| Propagation_Delay | 21.100 |
| Seated_Height_Max | 2.1000 |
| Supply_Voltage_Max | 3.60000 |
| Supply_Voltage_Min | 3.00000 |
| Supply_Voltage_Nom | 3.3 |
| Surface_Mount | Yes |
| Terminal_Form | Ball |
| Terminal_Pitch | 1.000 |
| Terminal_Position | Bottom |
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