EPF10K50SPC208-1
Loadable PLD, 8ns, CMOS, PQFP208Manufacturer: Altera
Categories: Programmable Logic Devices
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Altera EPF10K50 series Loadable PLD, part number EPF10K50SPC208-1, is a CMOS device featuring a 8ns propagation delay. This component offers 147 I/O lines and 4 dedicated inputs, with a total of 151 input pins and 147 output pins within a 208-terminal PQFP package. Operating from a 2.375V to 2.625V supply voltage range, it supports a maximum clock frequency of 714 MHz. The device is designed for surface mounting with a fine pitch of 0.500mm and a seated height maximum of 4.1mm. Its operating temperature range is 0°C to 70°C. This configurable logic device finds application in industrial automation, telecommunications, and consumer electronics sectors.
Additional Information
Series: EPF10K50RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Length | 28.0000 |
| Width | 28.0000 |
| Technology | CMOS |
| Clock_Frequency_Max | 714.00000 |
| JESD_30_Code | S-PQFP-G208 |
| Number_of_Dedicated_Inputs | 4 |
| Number_of_I_O_Lines | 147 |
| Number_of_Inputs | 151 |
| Number_of_Outputs | 147 |
| Number_of_Terminals | 208 |
| Operating_Temperature_Max | 70.0 |
| Operating_Temperature_Min | 0.0 |
| Organization | 4 DEDICATED INPUTS, 147 I/O |
| Output_Function | MIXED |
| Package_Body_Material | PLASTIC/EPOXY |
| Package_Code | FQFP |
| Package_Shape | Square |
| Package_Style | FLATPACK, FINE PITCH |
| Programmable_Logic_Type | LOADABLE PLD |
| Propagation_Delay | 8.000 |
| Seated_Height_Max | 4.1000 |
| Supply_Voltage_Max | 2.62500 |
| Supply_Voltage_Min | 2.37500 |
| Supply_Voltage_Nom | 2.5 |
| Surface_Mount | Yes |
| Terminal_Form | Gull Wing |
| Terminal_Pitch | 0.500 |
| Terminal_Position | QUAD |
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