EPF10K50SFI672-3X
Loadable PLD, 12.5ns, CMOS, PBGA672Manufacturer: Altera
Categories: Programmable Logic Devices
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Altera EPF10K50 FPGA, part number EPF10K50SFI672-3X, offers a loadable PLD architecture within the EPF10K50 series. This CMOS device features 254 I/O lines, 258 total inputs, and a propagation delay of 12.5 ns. Operating from a 2.3V to 2.7V supply range, it boasts a maximum clock frequency of 588.24 MHz. The component is housed in a 672-terminal S-PBGA (BGA672) package with a 1.000 mm terminal pitch, measuring 27.00 x 27.00 mm. Its operational temperature range spans from -40°C to +85°C. Applications for this device include telecommunications, industrial control, and computing systems.
Additional Information
Series: EPF10K50RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Width | 27.0000 |
| Technology | CMOS |
| Length | 27.0000 |
| Clock_Frequency_Max | 588.24000 |
| JESD_30_Code | S-PBGA-B672 |
| Number_of_Dedicated_Inputs | 4 |
| Number_of_I_O_Lines | 254 |
| Number_of_Inputs | 258 |
| Number_of_Outputs | 254 |
| Number_of_Terminals | 672 |
| Operating_Temperature_Max | 85.0 |
| Operating_Temperature_Min | -40.0 |
| Organization | 254 I/O |
| Output_Function | MIXED |
| Package_Body_Material | PLASTIC/EPOXY |
| Package_Code | BGA |
| Package_Equivalence_Code | BGA672,26X26,40 |
| Package_Shape | Square |
| Package_Style | GRID ARRAY |
| Programmable_Logic_Type | LOADABLE PLD |
| Propagation_Delay | 12.500 |
| Seated_Height_Max | 2.1000 |
| Supply_Voltage_Max | 2.70000 |
| Supply_Voltage_Min | 2.30000 |
| Supply_Voltage_Nom | 2.5 |
| Surface_Mount | Yes |
| Terminal_Form | Ball |
| Terminal_Pitch | 1.000 |
| Terminal_Position | Bottom |
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