EPF10K50EFC672-2
Loadable PLD, 10ns, CMOS, PBGA672Manufacturer: Altera
Categories: Programmable Logic Devices
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Altera EPF10K50EFC672-2 is a loadable Programmable Logic Device (PLD) from the EPF10K50 series. This CMOS device features a 10ns propagation delay and operates within a 2.3V to 2.7V supply voltage range, with a nominal 2.5V. It is housed in a 672-terminal PBGA (Ball Grid Array) package with a 1.000mm terminal pitch, measuring 27x27mm. The device offers 254 I/O lines and 4 dedicated inputs, supporting a maximum clock frequency of 833.33 MHz. Ideal for applications in industrial control, telecommunications, and high-performance computing, this surface-mount component is designed for demanding electronic system implementations.
Additional Information
Series: EPF10K50RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Length | 27.0000 |
| Width | 27.0000 |
| Technology | CMOS |
| Clock_Frequency_Max | 833.33000 |
| JESD_30_Code | S-PBGA-B672 |
| Number_of_Dedicated_Inputs | 4 |
| Number_of_I_O_Lines | 254 |
| Number_of_Inputs | 258 |
| Number_of_Outputs | 254 |
| Number_of_Terminals | 672 |
| Operating_Temperature_Max | 70.0 |
| Operating_Temperature_Min | 0.0 |
| Organization | 4 DEDICATED INPUTS, 254 I/O |
| Output_Function | MIXED |
| Package_Body_Material | PLASTIC/EPOXY |
| Package_Code | BGA |
| Package_Equivalence_Code | BGA672,26X26,40 |
| Package_Shape | Square |
| Package_Style | GRID ARRAY |
| Programmable_Logic_Type | LOADABLE PLD |
| Propagation_Delay | 10.000 |
| Seated_Height_Max | 2.1000 |
| Supply_Voltage_Max | 2.70000 |
| Supply_Voltage_Min | 2.30000 |
| Supply_Voltage_Nom | 2.5 |
| Surface_Mount | Yes |
| Terminal_Form | Ball |
| Terminal_Pitch | 1.000 |
| Terminal_Position | Bottom |
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