EPF10K30GI403-5
Loadable PLD, 27ns, CMOS, CPGA403Manufacturer: Altera
Categories: Programmable Logic Devices
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The Altera EPF10K30GI403-5 is a loadable PLD from the EPF10K30 series. This device features 1728 logic elements and 248 configurable I/O lines, supporting 3.3V or 5V operation. With a typical propagation delay of 27 ns, it offers a maximum clock frequency of 53.76 MHz. The component is housed in a 403-terminal ceramic grid array package (CPGA403) with an interstitial pitch. Designed for operation between -40°C and 85°C, this CMOS technology device is suitable for applications in telecommunications, industrial control, and high-performance computing. It includes 4 dedicated inputs and 252 total inputs.
Additional Information
Series: EPF10K30RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Length | 49.7800 |
| Width | 49.7800 |
| Technology | CMOS |
| Additional_Feature | 1728 LOGIC ELEMENTS CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V |
| Clock_Frequency_Max | 53.76000 |
| JESD_30_Code | S-CPGA-P403 |
| Number_of_Dedicated_Inputs | 4 |
| Number_of_I_O_Lines | 248 |
| Number_of_Inputs | 252 |
| Number_of_Outputs | 248 |
| Number_of_Terminals | 403 |
| Operating_Temperature_Max | 85.0 |
| Operating_Temperature_Min | -40.0 |
| Organization | 4 DEDICATED INPUTS, 248 I/O |
| Output_Function | REGISTERED |
| Package_Body_Material | CERAMIC, METAL-SEALED COFIRED |
| Package_Code | IPGA |
| Package_Equivalence_Code | SPGA403M,37X37 |
| Package_Shape | Square |
| Package_Style | GRID ARRAY, INTERSTITIAL PITCH |
| Programmable_Logic_Type | LOADABLE PLD |
| Propagation_Delay | 27.000 |
| Seated_Height_Max | 3.9160 |
| Supply_Voltage_Max | 5.50000 |
| Supply_Voltage_Min | 4.50000 |
| Supply_Voltage_Nom | 5 |
| Surface_Mount | No |
| Terminal_Form | PIN/PEG |
| Terminal_Pitch | 2.540 |
| Terminal_Position | Perpendicular |
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