EPF10K250AGI599-1
Loadable PLD, 15ns, CMOS, CPGA599Manufacturer: Altera
Categories: Programmable Logic Devices
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Altera EPF10K250AGI599-1 is a loadable PLD featuring CMOS technology and a 15ns propagation delay. This component offers 4 dedicated inputs and 470 I/O lines within a 599-terminal Ceramic Pin Grid Array (CPGA) package. Its organization includes 503 total inputs and 499 outputs, with registered output functions. The device operates within a temperature range of -40°C to +85°C and supports a supply voltage from 3.0V to 3.6V, with a nominal value of 3.3V. This type of programmable logic is commonly utilized in telecommunications, industrial automation, and computing applications requiring flexible digital signal processing and control. The S-CPGA-P599 package code indicates a square, metal-sealed cofired ceramic grid array with an interstitial pitch.
Additional Information
Series: EPF10K250RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Width | 62.4840 |
| Technology | CMOS |
| Length | 62.4840 |
| JESD_30_Code | S-CPGA-P599 |
| Number_of_Dedicated_Inputs | 4 |
| Number_of_I_O_Lines | 470 |
| Number_of_Inputs | 503 |
| Number_of_Outputs | 499 |
| Number_of_Terminals | 599 |
| Operating_Temperature_Max | 85.0 |
| Operating_Temperature_Min | -40.0 |
| Organization | 4 DEDICATED INPUTS, 470 I/O |
| Output_Function | REGISTERED |
| Package_Body_Material | CERAMIC, METAL-SEALED COFIRED |
| Package_Code | IPGA |
| Package_Equivalence_Code | SPGA599,47X47 |
| Package_Shape | Square |
| Package_Style | GRID ARRAY, INTERSTITIAL PITCH |
| Programmable_Logic_Type | LOADABLE PLD |
| Propagation_Delay | 15.000 |
| Seated_Height_Max | 5.0800 |
| Supply_Voltage_Max | 3.60000 |
| Supply_Voltage_Min | 3.00000 |
| Supply_Voltage_Nom | 3.3 |
| Surface_Mount | No |
| Terminal_Form | PIN/PEG |
| Terminal_Pitch | 2.540 |
| Terminal_Position | Perpendicular |
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