EPF10K20LI84-4
Loadable PLD, 23.8ns, CMOS, PQCC84Manufacturer: Altera
Categories: Programmable Logic Devices
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Altera EPF10K20LI84-4 is a loadable PLD featuring 1152 logic elements and a maximum clock frequency of 60.6 MHz. This CMOS device operates within a supply voltage range of 4.5V to 5.5V, with a nominal 5V. It offers 4 dedicated inputs and registered output functions. The component incorporates built-in JTAG boundary-scan circuitry for testing. With a propagation delay of 23.8ns, this PLD is suitable for applications in telecommunications, industrial automation, and consumer electronics. The component is housed in an 84-terminal J-bend PQCC package (JESD-30 Code: S-PQCC-J84) with a terminal pitch of 1.270mm. Its operating temperature range is from -40°C to +85°C.
Additional Information
Series: EPF10K20RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Length | 29.3116 |
| Width | 29.3116 |
| Technology | CMOS |
| Additional_Feature | 1152 LOGIC ELEMENTS; BUILT-IN JTAG BOUNDARY-SCAN TEST CIRCUITRY |
| Clock_Frequency_Max | 60.60000 |
| JESD_30_Code | S-PQCC-J84 |
| Number_of_Dedicated_Inputs | 4 |
| Number_of_Terminals | 84 |
| Operating_Temperature_Max | 85.0 |
| Operating_Temperature_Min | -40.0 |
| Organization | 4 DEDICATED INPUTS |
| Output_Function | REGISTERED |
| Package_Body_Material | PLASTIC/EPOXY |
| Package_Code | QCCJ |
| Package_Shape | Square |
| Package_Style | CHIP CARRIER |
| Programmable_Logic_Type | LOADABLE PLD |
| Propagation_Delay | 23.800 |
| Seated_Height_Max | 5.0800 |
| Supply_Voltage_Max | 5.50000 |
| Supply_Voltage_Min | 4.50000 |
| Supply_Voltage_Nom | 5 |
| Surface_Mount | Yes |
| Terminal_Form | J BEND |
| Terminal_Pitch | 1.270 |
| Terminal_Position | QUAD |
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