EPF10K200EGI599-2
Loadable PLD, 12ns, CMOS, CPGA599Manufacturer: Altera
Categories: Programmable Logic Devices
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Altera EPF10K200EGI599-2 is a loadable Programmable Logic Device (PLD) from the EPF10K200 series. This CMOS component features a maximum clock frequency of 833.33 MHz and a propagation delay of 12 ns. It is housed in a 599-terminal Ceramic Pin Grid Array (CPGA) package, specifically a square, metal-sealed cofired grid array with an interstitial pitch. The device offers 470 I/O lines and 474 total inputs, with 4 dedicated inputs. Operating within a temperature range of -40°C to 85°C, it requires a supply voltage between 2.3V and 2.7V, with a nominal value of 2.5V. This PLD finds application in various industrial sectors, including telecommunications, computing, and military systems.
Additional Information
Series: EPF10K200RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Length | 62.4840 |
| Width | 62.4840 |
| Technology | CMOS |
| Clock_Frequency_Max | 833.33000 |
| JESD_30_Code | S-CPGA-P599 |
| Number_of_Dedicated_Inputs | 4 |
| Number_of_I_O_Lines | 470 |
| Number_of_Inputs | 474 |
| Number_of_Outputs | 470 |
| Number_of_Terminals | 599 |
| Operating_Temperature_Max | 85.0 |
| Operating_Temperature_Min | -40.0 |
| Organization | 4 DEDICATED INPUTS, 470 I/O |
| Output_Function | MIXED |
| Package_Body_Material | CERAMIC, METAL-SEALED COFIRED |
| Package_Code | IPGA |
| Package_Equivalence_Code | SPGA599,47X47 |
| Package_Shape | Square |
| Package_Style | GRID ARRAY, INTERSTITIAL PITCH |
| Programmable_Logic_Type | LOADABLE PLD |
| Propagation_Delay | 12.000 |
| Seated_Height_Max | 5.0800 |
| Supply_Voltage_Max | 2.70000 |
| Supply_Voltage_Min | 2.30000 |
| Supply_Voltage_Nom | 2.5 |
| Surface_Mount | No |
| Terminal_Form | PIN/PEG |
| Terminal_Pitch | 2.540 |
| Terminal_Position | Perpendicular |
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