Home

Products

Embedded

CPLDs (Complex Programmable Logic Devices)

Programmable Logic Devices

EPF10K130EFC484-3X

Banner
productimage

EPF10K130EFC484-3X

Loadable PLD, 0.6ns, CMOS, PBGA484

Manufacturer: Altera

Categories: Programmable Logic Devices

Quality Control: Learn More

The Altera EPF10K130EFC484-3X is a loadable PLD from the EPF10K130 series, featuring a CMOS technology and a 0.6ns propagation delay. This device offers 369 I/O lines, 6 dedicated inputs, and a total of 484 terminals within a square, grid array BGA package with a 1.000mm terminal pitch. Operating within a temperature range of 0°C to 70°C, it supports a nominal supply voltage of 2.5V, with a maximum of 2.625V and a minimum of 2.375V. This component is suitable for applications in telecommunications, industrial control, and data processing systems. The S-PBGA-B484 package style provides a robust surface-mount solution.

Additional Information

Series: EPF10K130RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:
Technical Details:
Length23.0000
Width23.0000
TechnologyCMOS
Clock_Frequency_Max625.00000
JESD_30_CodeS-PBGA-B484
Number_of_Dedicated_Inputs6
Number_of_I_O_Lines369
Number_of_Inputs369
Number_of_Outputs369
Number_of_Terminals484
Operating_Temperature_Max70.0
Operating_Temperature_Min0.0
Organization6 DEDICATED INPUTS, 369 I/O
Output_FunctionMIXED
Package_Body_MaterialPLASTIC/EPOXY
Package_CodeBGA
Package_ShapeSquare
Package_StyleGRID ARRAY
Programmable_Logic_TypeLOADABLE PLD
Propagation_Delay0.600
Seated_Height_Max2.1000
Supply_Voltage_Max2.62500
Supply_Voltage_Min2.37500
Supply_Voltage_Nom2.5
Surface_MountYes
Terminal_FormBall
Terminal_Pitch1.000
Terminal_PositionBottom

Request a Quote

Name (required)

Phone (required)

Work Email (required)

Country (required)

Company Name (required)

CAPTCHA

Clients Also Buy
product image
EPF10K130EBI356-2X

Loadable PLD, 0.5ns, CMOS, PBGA356

product image
EPF10K130EFC672-1N

Loadable PLD, 0.3ns, CMOS, PBGA672

product image
EPF10K130EFC672-3N

Loadable PLD, 0.6ns, CMOS, PBGA672