EPF10K100GC503-5
Loadable PLD, 0.5ns, CMOS, PPGA503Manufacturer: Altera
Categories: Programmable Logic Devices
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Altera EPF10K100GC503-5 is a loadable PLD from the EPF10K100 series. This CMOS device features a 0.5ns propagation delay and operates from a 2.375V to 2.625V supply range, with a nominal voltage of 2.5V. It is housed in a 503-terminal PPGA (Plastic Pin Grid Array) package with a terminal pitch of 1.270mm. The organization includes 4 dedicated inputs and 406 I/O lines. This device supports in-system programming and JTAG boundary scan testing. Applications can be found in telecommunications, data processing, and industrial control systems. The operating temperature range is 0.0°C to 70.0°C.
Additional Information
Series: EPF10K100RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Technology | CMOS |
| In_System_Programmable | Yes |
| JESD_30_Code | S-PPGA-P503 |
| JTAG_BST | Yes |
| Number_of_Dedicated_Inputs | 4 |
| Number_of_I_O_Lines | 406 |
| Number_of_Inputs | 406 |
| Number_of_Outputs | 406 |
| Number_of_Terminals | 503 |
| Operating_Temperature_Max | 70.0 |
| Operating_Temperature_Min | 0.0 |
| Organization | 4 DEDICATED INPUTS, 406 I/O |
| Output_Function | REGISTERED |
| Package_Body_Material | PLASTIC/EPOXY |
| Package_Code | PGA |
| Package_Equivalence_Code | SPGA503,43X43 |
| Package_Shape | Square |
| Package_Style | GRID ARRAY |
| Programmable_Logic_Type | LOADABLE PLD |
| Propagation_Delay | 0.500 |
| Supply_Voltage_Max | 2.62500 |
| Supply_Voltage_Min | 2.37500 |
| Supply_Voltage_Nom | 2.5 |
| Surface_Mount | No |
| Terminal_Form | PIN/PEG |
| Terminal_Pitch | 1.270 |
| Terminal_Position | Perpendicular |
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