EP910PI40-35
OT PLD, 38ns, PAL-Type, CMOS, PDIP40Manufacturer: Altera
Categories: Programmable Logic Devices
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Altera's EP910PI40-35 is an OT PLD from the EP910 series, featuring a PAL-type architecture and CMOS technology. This through-hole component, housed in a 40-pin PDIP package (JESD-30 Code: R-PDIP-T40), offers 24 macrocells and 2 external clock inputs. It provides 36 total inputs, with 12 dedicated inputs, and supports 24 I/O lines. The device has a maximum clock frequency of 37 MHz and a typical propagation delay of 38 ns. Operating within a temperature range of -40°C to +85°C, it requires a supply voltage between 4.5V and 5.5V. Applications for this component are found in industrial automation and telecommunications infrastructure.
Additional Information
Series: EP910RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Length | 52.4256 |
| Width | 15.2400 |
| Technology | CMOS |
| Architecture | PAL-TYPE |
| Additional_Feature | 24 MACROCELLS; 2 EXTERNAL CLOCKS |
| Clock_Frequency_Max | 37.00000 |
| JESD_30_Code | R-PDIP-T40 |
| Number_of_Dedicated_Inputs | 12 |
| Number_of_I_O_Lines | 24 |
| Number_of_Inputs | 36 |
| Number_of_Outputs | 24 |
| Number_of_Product_Terms | 240 |
| Number_of_Terminals | 40 |
| Operating_Temperature_Max | 85.0 |
| Operating_Temperature_Min | -40.0 |
| Organization | 12 DEDICATED INPUTS, 24 I/O |
| Output_Function | MACROCELL |
| Package_Body_Material | PLASTIC/EPOXY |
| Package_Code | DIP |
| Package_Equivalence_Code | DIP40,.6 |
| Package_Shape | Rectangular |
| Package_Style | IN-LINE |
| Programmable_Logic_Type | OT PLD |
| Propagation_Delay | 38.000 |
| Seated_Height_Max | 4.8260 |
| Supply_Voltage_Max | 5.50000 |
| Supply_Voltage_Min | 4.50000 |
| Supply_Voltage_Nom | 5 |
| Surface_Mount | No |
| Terminal_Form | THROUGH-HOLE |
| Terminal_Pitch | 2.540 |
| Terminal_Position | Dual |
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