EP910PC40-30T
OT PLD, 33ns, CMOS, PDIP40Manufacturer: Altera
Categories: Programmable Logic Devices
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The Altera EP910PC40-30T is a CMOS OT PLD featuring 24 macrocells and 2 external clock inputs. This device offers a maximum clock frequency of 33.3 MHz with a propagation delay of 33 ns. Configured with 12 dedicated inputs and 24 I/O lines, it operates from a supply voltage range of 4.75 V to 5.25 V. The EP910PC40-30T is housed in a 40-terminal PDIP (R-PDIP-T40) package, a through-hole component designed for through-hole mounting. This component finds application in industrial automation, consumer electronics, and telecommunications sectors.
Additional Information
Series: EP910PC40RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Length | 52.4256 |
| Width | 15.2400 |
| Technology | CMOS |
| Additional_Feature | 24 MACROCELLS; 2 EXTERNAL CLOCKS |
| Clock_Frequency_Max | 33.30000 |
| JESD_30_Code | R-PDIP-T40 |
| Number_of_Dedicated_Inputs | 12 |
| Number_of_I_O_Lines | 24 |
| Number_of_Terminals | 40 |
| Operating_Temperature_Max | 70.0 |
| Operating_Temperature_Min | 0.0 |
| Organization | 12 DEDICATED INPUTS, 24 I/O |
| Output_Function | MACROCELL |
| Package_Body_Material | PLASTIC/EPOXY |
| Package_Code | DIP |
| Package_Equivalence_Code | DIP40,.6 |
| Package_Shape | Rectangular |
| Package_Style | IN-LINE |
| Programmable_Logic_Type | OT PLD |
| Propagation_Delay | 33.000 |
| Seated_Height_Max | 4.4450 |
| Supply_Voltage_Max | 5.25000 |
| Supply_Voltage_Min | 4.75000 |
| Supply_Voltage_Nom | 5 |
| Surface_Mount | No |
| Terminal_Form | THROUGH-HOLE |
| Terminal_Pitch | 2.540 |
| Terminal_Position | Dual |
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