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EP910APC-25

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EP910APC-25

OT PLD, 25ns, PAL-Type, CMOS, PDIP40

Manufacturer: Altera

Categories: Programmable Logic Devices

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The Altera EP910APC-25 is a 25ns OT PLD from the EP910 series, featuring a PAL-type architecture and CMOS technology. This device offers 24 macrocells interconnected by a global bus, with 12 dedicated inputs and 24 I/O lines, supporting up to 36 total inputs and 24 outputs. It includes 2 external clock inputs and a maximum clock frequency of 40 MHz. The device is housed in a 40-pin PDIP package (R-PDIP-T40) with through-hole termination and a 2.54mm terminal pitch. Operating voltage ranges from 4.75V to 5.25V, with a nominal supply of 5V. The operating temperature spans from 0°C to 70°C. This component finds application in industrial automation, consumer electronics, and telecommunications systems requiring flexible combinatorial and sequential logic implementation.

Additional Information

Series: EP910RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:
Technical Details:
Width15.2400
TechnologyCMOS
ArchitecturePAL-TYPE
Length52.4256
Additional_FeatureMACROCELLS INTERCONNECTED BY GLOBAL BUS; 24 MACROCELLS; 2 EXTERNAL CLOCKS
Clock_Frequency_Max40.00000
JESD_30_CodeR-PDIP-T40
Number_of_Dedicated_Inputs12
Number_of_I_O_Lines24
Number_of_Inputs36
Number_of_Outputs24
Number_of_Product_Terms240
Number_of_Terminals40
Operating_Temperature_Max70.0
Operating_Temperature_Min0.0
Organization12 DEDICATED INPUTS, 24 I/O
Output_FunctionMACROCELL
Package_Body_MaterialPLASTIC/EPOXY
Package_CodeDIP
Package_Equivalence_CodeDIP40,.6
Package_ShapeRectangular
Package_StyleIN-LINE
Programmable_Logic_TypeOT PLD
Propagation_Delay25.000
Seated_Height_Max4.4450
Supply_Voltage_Max5.25000
Supply_Voltage_Min4.75000
Supply_Voltage_Nom5
Surface_MountNo
Terminal_FormTHROUGH-HOLE
Terminal_Pitch2.540
Terminal_PositionDual

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