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EP630LC-15

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EP630LC-15

OT PLD, 17ns, PAL-Type, CMOS, PQCC28

Manufacturer: Altera

Categories: Programmable Logic Devices

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The Altera EP630LC-15 is an OT PLD from the EP630 series, featuring a PAL-type architecture and CMOS technology. This component offers 16 macrocells interconnected by a global bus, with support for two external clocks. It provides 160 product terms and 16 I/O lines, alongside 4 dedicated inputs, totaling 20 input lines. The propagation delay is 17ns, and the maximum clock frequency is 71.4 MHz. Operating within a temperature range of 0°C to 70°C, it requires a supply voltage of 5V (nominal, 4.75V to 5.25V). The component is housed in a 28-terminal PQCC package (JESD_30 Code: S-PQCC-J28) with a terminal pitch of 1.270mm. This device is suitable for applications in industrial automation and consumer electronics.

Additional Information

Series: EP630RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:
Technical Details:
Length11.5062
Width11.5062
TechnologyCMOS
ArchitecturePAL-TYPE
Additional_FeatureMACROCELLS INTERCONNECTED BY GLOBAL BUS; 16 MACROCELLS; 2 EXTERNAL CLOCKS
Clock_Frequency_Max71.40000
JESD_30_CodeS-PQCC-J28
Number_of_Dedicated_Inputs4
Number_of_I_O_Lines16
Number_of_Inputs20
Number_of_Outputs16
Number_of_Product_Terms160
Number_of_Terminals28
Operating_Temperature_Max70.0
Operating_Temperature_Min0.0
Organization4 DEDICATED INPUTS, 16 I/O
Output_FunctionMACROCELL
Package_Body_MaterialPLASTIC/EPOXY
Package_CodeQCCJ
Package_Equivalence_CodeLDCC28,.5SQ
Package_ShapeSquare
Package_StyleCHIP CARRIER
Programmable_Logic_TypeOT PLD
Propagation_Delay17.000
Seated_Height_Max4.5720
Supply_Voltage_Max5.25000
Supply_Voltage_Min4.75000
Supply_Voltage_Nom5
Surface_MountYes
Terminal_FormJ BEND
Terminal_Pitch1.270
Terminal_PositionQUAD

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