EP610DC24-30
UV PLD, 32ns, PAL-Type, CMOS, CDIP24Manufacturer: Altera
Categories: Programmable Logic Devices
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The Altera EP610DC24-30 is a UV Programmable Logic Device from the EP610 series, featuring a PAL-type architecture. This CMOS component offers 16 macrocells and supports 2 external clocks. It operates with a maximum clock frequency of 41.7 MHz and a propagation delay of 32 ns. The device is housed in a 24-pin CDIP package (JESD-30 code: R-GDIP-T24) with through-hole mounting. Key specifications include 20 input lines, 16 output lines, and 160 product terms. Operating within a temperature range of 0°C to 70°C, it requires a supply voltage between 4.75V and 5.25V. This component is commonly utilized in industrial control systems and telecommunications equipment.
Additional Information
Series: EP610RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Width | 7.6200 |
| Technology | CMOS |
| Architecture | PAL-TYPE |
| Length | 32.0000 |
| Additional_Feature | 16 MACROCELLS; 2 EXTERNAL CLOCKS |
| Clock_Frequency_Max | 41.70000 |
| JESD_30_Code | R-GDIP-T24 |
| Number_of_Dedicated_Inputs | 4 |
| Number_of_I_O_Lines | 16 |
| Number_of_Inputs | 20 |
| Number_of_Outputs | 16 |
| Number_of_Product_Terms | 160 |
| Number_of_Terminals | 24 |
| Operating_Temperature_Max | 70.0 |
| Operating_Temperature_Min | 0.0 |
| Organization | 4 DEDICATED INPUTS, 16 I/O |
| Output_Function | MACROCELL |
| Package_Body_Material | CERAMIC, GLASS-SEALED |
| Package_Code | WDIP |
| Package_Equivalence_Code | DIP24,.3 |
| Package_Shape | Rectangular |
| Package_Style | IN-LINE, WINDOW |
| Programmable_Logic_Type | UV PLD |
| Propagation_Delay | 32.000 |
| Seated_Height_Max | 5.0800 |
| Supply_Voltage_Max | 5.25000 |
| Supply_Voltage_Min | 4.75000 |
| Supply_Voltage_Nom | 5 |
| Surface_Mount | No |
| Terminal_Form | THROUGH-HOLE |
| Terminal_Pitch | 2.540 |
| Terminal_Position | Dual |
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