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EP610APC24-12

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EP610APC24-12

EE PLD, 12ns, CMOS, PDIP24

Manufacturer: Altera

Categories: Programmable Logic Devices

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Altera EP610APC24-12 is an electrically erasable Programmable Logic Device (EE PLD) from the EP610APC24 series. This CMOS component features a 12ns propagation delay and is housed in a 24-pin Plastic Dual In-line Package (PDIP). The device offers 16 macrocells and supports 2 external clocks, with a maximum clock frequency of 83.3 MHz. It provides 4 dedicated inputs and 16 I/O lines, organized as 4 dedicated inputs and 16 I/O. Operating within a temperature range of 0°C to 70°C, it requires a supply voltage between 4.75V and 5.25V, with a nominal value of 5V. The through-hole package has a terminal pitch of 2.54mm, and its overall dimensions are 31.6865mm in length and 7.6200mm in width. This component finds application in industrial control, telecommunications, and consumer electronics.

Additional Information

Series: EP610APC24RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:
Technical Details:
Length31.6865
Width7.6200
TechnologyCMOS
Additional_Feature16 MACROCELLS; 2 EXTERNAL CLOCKS
Clock_Frequency_Max83.30000
JESD_30_CodeR-PDIP-T24
Number_of_Dedicated_Inputs4
Number_of_I_O_Lines16
Number_of_Terminals24
Operating_Temperature_Max70.0
Operating_Temperature_Min0.0
Organization4 DEDICATED INPUTS, 16 I/O
Output_FunctionMACROCELL
Package_Body_MaterialPLASTIC/EPOXY
Package_CodeDIP
Package_Equivalence_CodeDIP24,.3
Package_ShapeRectangular
Package_StyleIN-LINE
Programmable_Logic_TypeEE PLD
Propagation_Delay12.000
Seated_Height_Max4.3180
Supply_Voltage_Max5.25000
Supply_Voltage_Min4.75000
Supply_Voltage_Nom5
Surface_MountNo
Terminal_FormTHROUGH-HOLE
Terminal_Pitch2.540
Terminal_PositionDual

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