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EP610ALC28-7

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EP610ALC28-7

EE PLD, 7.5ns, CMOS, PQCC28

Manufacturer: Altera

Categories: Programmable Logic Devices

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The Altera EP610ALC28-7 is a 7.5ns EE PLD from the EP610 series, featuring a CMOS technology in a PQCC28 package. This device offers 16 macrocells and supports 2 external clocks, with a maximum clock frequency of 125 MHz. It provides 4 dedicated inputs and 16 I/O lines, organized as 4 dedicated inputs and 16 I/O. Operating within a temperature range of 0°C to 70°C, it requires a supply voltage between 4.75V and 5.25V, with a nominal 5V. The component is surface-mount, with a square chip carrier package style (JESD30 Code S-PQCC-J28) and J-bend terminals on a 1.270mm pitch. This device is suitable for applications in industrial control, telecommunications, and computing systems.

Additional Information

Series: EP610RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:
Technical Details:
Length11.5062
Width11.5062
TechnologyCMOS
Additional_Feature16 MACROCELLS; 2 EXTERNAL CLOCKS
Clock_Frequency_Max125.00000
JESD_30_CodeS-PQCC-J28
Number_of_Dedicated_Inputs4
Number_of_I_O_Lines16
Number_of_Terminals28
Operating_Temperature_Max70.0
Operating_Temperature_Min0.0
Organization4 DEDICATED INPUTS, 16 I/O
Output_FunctionMACROCELL
Package_Body_MaterialPLASTIC/EPOXY
Package_CodeQCCJ
Package_Equivalence_CodeLDCC28,.5SQ
Package_ShapeSquare
Package_StyleCHIP CARRIER
Programmable_Logic_TypeEE PLD
Propagation_Delay7.500
Seated_Height_Max4.5720
Supply_Voltage_Max5.25000
Supply_Voltage_Min4.75000
Supply_Voltage_Nom5
Surface_MountYes
Terminal_FormJ BEND
Terminal_Pitch1.270
Terminal_PositionQUAD

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