EP600PC-2
OT PLD, 35ns, CMOS, PDIP24Manufacturer: Altera
Categories: Programmable Logic Devices
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Altera EP600 series OT PLD, part number EP600PC-2. This CMOS device features a propagation delay of 35 ns and a maximum clock frequency of 22.2 MHz. It offers 4 dedicated inputs and 16 I/O lines, with a macrocell output function. The component operates within a temperature range of 0°C to 70°C and requires a supply voltage between 4.75V and 5.25V. It is housed in a 24-pin plastic dual in-line package (PDIP) with a terminal pitch of 2.54 mm. The EP600PC-2 is suitable for applications in industrial and telecommunications sectors.
Additional Information
Series: EP600RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Length | 26.1620 |
| Width | 7.6200 |
| Technology | CMOS |
| Additional_Feature | LG_MAX, SEATED HGT-NOM |
| Clock_Frequency_Max | 22.20000 |
| JESD_30_Code | R-PDIP-T24 |
| Number_of_Dedicated_Inputs | 4 |
| Number_of_I_O_Lines | 16 |
| Number_of_Terminals | 24 |
| Operating_Temperature_Max | 70.0 |
| Operating_Temperature_Min | 0.0 |
| Organization | 4 DEDICATED INPUTS, 16 I/O |
| Output_Function | MACROCELL |
| Package_Body_Material | PLASTIC/EPOXY |
| Package_Code | DIP |
| Package_Shape | Rectangular |
| Package_Style | IN-LINE |
| Programmable_Logic_Type | OT PLD |
| Propagation_Delay | 35.000 |
| Seated_Height_Max | 3.8100 |
| Supply_Voltage_Max | 5.25000 |
| Supply_Voltage_Min | 4.75000 |
| Supply_Voltage_Nom | 5 |
| Surface_Mount | No |
| Terminal_Form | THROUGH-HOLE |
| Terminal_Pitch | 2.540 |
| Terminal_Position | Dual |
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