EP320IDC-30
EE PLD, 30ns, PAL-Type, CMOS, CDIP20Manufacturer: Altera
Categories: Programmable Logic Devices
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The Altera EP320IDC-30 is a CMOS EE PLD from the EP320 series, featuring a PAL-type architecture. This component offers 18 inputs and 8 outputs, supported by 72 product terms. With a propagation delay of 30ns and a maximum clock frequency of 28.5 MHz, it is suitable for applications requiring fast logic implementation. The device operates from a 5V nominal supply voltage and is housed in a 20-terminal CDIP package (JESD-30 Code: R-XDIP-T20). Its through-hole mounting and dual in-line package style make it compatible with traditional PCB assembly. This component finds application in industrial automation and communication systems.
Additional Information
Series: EP320RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Technology | CMOS |
| Architecture | PAL-TYPE |
| Clock_Frequency_Max | 28.50000 |
| JESD_30_Code | R-XDIP-T20 |
| Number_of_Inputs | 18 |
| Number_of_Outputs | 8 |
| Number_of_Product_Terms | 72 |
| Number_of_Terminals | 20 |
| Operating_Temperature_Max | 70.0 |
| Operating_Temperature_Min | 0.0 |
| Output_Function | MACROCELL |
| Package_Body_Material | Ceramic |
| Package_Code | DIP |
| Package_Equivalence_Code | DIP20,.3 |
| Package_Shape | Rectangular |
| Package_Style | IN-LINE |
| Programmable_Logic_Type | EE PLD |
| Propagation_Delay | 30.000 |
| Supply_Voltage_Nom | 5 |
| Surface_Mount | No |
| Terminal_Form | THROUGH-HOLE |
| Terminal_Pitch | 2.540 |
| Terminal_Position | Dual |
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