EP312PC-30
OT PLD, 30ns, PAL-Type, CMOS, PDIP24Manufacturer: Altera
Categories: Programmable Logic Devices
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The Altera EP312PC-30 is a 30ns OT PLD from the EP312 series, featuring a PAL-type architecture and CMOS technology. This device offers 12 macrocells and 200 product terms, supported by 8 dedicated inputs and 12 I/O lines. With a maximum clock frequency of 50 MHz and a propagation delay of 30ns, it is suitable for various applications requiring flexible logic implementation. The EP312PC-30 is housed in a 24-pin PDIP package (R-PDIP-T24) with through-hole mounting and a 2.540mm terminal pitch. It operates within a supply voltage range of 4.75V to 5.25V and an industrial temperature range of 0°C to 70°C. This component is commonly found in industrial automation and consumer electronics designs.
Additional Information
Series: EP312RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Length | 31.6865 |
| Width | 7.6200 |
| Technology | CMOS |
| Architecture | PAL-TYPE |
| Additional_Feature | 12 MACROCELLS |
| Clock_Frequency_Max | 50.00000 |
| JESD_30_Code | R-PDIP-T24 |
| Number_of_Dedicated_Inputs | 8 |
| Number_of_I_O_Lines | 12 |
| Number_of_Inputs | 22 |
| Number_of_Outputs | 12 |
| Number_of_Product_Terms | 200 |
| Number_of_Terminals | 24 |
| Operating_Temperature_Max | 70.0 |
| Operating_Temperature_Min | 0.0 |
| Organization | 8 DEDICATED INPUTS, 12 I/O |
| Output_Function | MACROCELL |
| Package_Body_Material | PLASTIC/EPOXY |
| Package_Code | DIP |
| Package_Equivalence_Code | DIP24,.3 |
| Package_Shape | Rectangular |
| Package_Style | IN-LINE |
| Programmable_Logic_Type | OT PLD |
| Propagation_Delay | 30.000 |
| Seated_Height_Max | 4.3180 |
| Supply_Voltage_Max | 5.25000 |
| Supply_Voltage_Min | 4.75000 |
| Supply_Voltage_Nom | 5 |
| Surface_Mount | No |
| Terminal_Form | THROUGH-HOLE |
| Terminal_Pitch | 2.540 |
| Terminal_Position | Dual |
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